Datasheet > JD54F64BCA

JD54F64BCA

更新时间： 2024-10-02 10:29:35

品牌	Logo	应用领域
德州仪器 - TI		栅
页数	文件大小	规格书
6页	118K
描述
Gate

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数据手册

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JD54F64BCA 数据手册

November 1994

54F/74F64

4-2-3-2-Input AND-OR-Invert Gate

General Description

This device contains gates configured to perform a 4-2-3-2

input AND-OR-INVERT function.

Package

Commercial

74F64PC

Military

Package Description

Number

N14A

J14A

14-Lead (0.300 Wide) Molded Dual-In-Line

54F64DM (Note 2)

14-Lead Ceramic Dual-In-Line

74F64SC (Note 1)

M14A

W14B

E20A

14-Lead (0.150 Wide) Molded Small Outline, JEDEC

54F64FM (Note 2)

54F64LM (Note 2)

14-Lead Cerpack

20-Lead Ceramic Leadless Chip Carrier, Type C

Note 1: Devices also available in 13 reel. Use suffix

SCX.

Note 2: Military grade device with environmental and burn-in processing. Use suffix

DMQB, FMQB and LMQB.

Logic Symbol

Connection Diagrams

Pin Assignment for

DIP, SOIC and Flatpak

Pin Assignment

for LCC

IEEE/IEC

TL/F/9467–2

TL/F/9467–1

TL/F/9467–3

Unit Loading/Fan Out

54F/74F

Pin Names

Description

U.L.

Input I /I

IH IL

Output I /I

HIGH/LOW

OH OL

20 mA/ 0.6 mA

1 mA/20 mA

A , B , C , D

Inputs

1.0/1.0

50/33.3

Output

TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.

1995 National Semiconductor Corporation

TL/F/9467

RRD-B30M105/Printed in U. S. A.

12 3 4 5 6

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