Datasheet > JANTXVR2N7494U5

JANTXVR2N7494U5

更新时间： 2023-03-15 00:00:00

品牌	Logo	应用领域
英飞凌 - INFINEON		/
页数	文件大小	规格书
25页	222K
描述
Power Field-Effect Transistor, 12A I(D), 30V, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, LCC-18

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JANTXVR2N7494U5 数据手册

INCH-POUND

The documentation and process conversion

measures necessary to comply with this revision

shall be completed by 3 August 2011.

MIL-PRF-19500/700B

3 May 2011

SUPERSEDING

MIL-PRF-19500/700A

27 January 2005

PERFORMANCE SPECIFICATION SHEET

SEMICONDUCTOR DEVICE, FIELD EFFECT RADIATION HARDENED

(TOTAL DOSE AND SINGLE EVENT EFFECTS) TRANSISTOR, N-CHANNEL,

SILICON, TYPES 2N7494U5, 2N7495U5, AND 2N7496U5,

JANTXVR, F, G, AND H, AND JANSR, F, G, AND H

This specification is approved for use by all Departments

and Agencies of the Department of Defense.

The requirements for acquiring the product described herein shall consist of

this specification sheet and MIL-PRF-19500.

1. SCOPE

1.1 Scope. This specification covers the performance requirements for a N-channel, enhancement-mode,

MOSFET, radiation hardened (Total Dose and Single Event Effects (SEE)), power transistor. Two levels of product

assurance are provided for each device type as specified in MIL-PRF-19500, with avalanche energy maximum rating

(E_AS) and maximum avalanche current (I_AS).

1.2 Physical dimensions. See figure 1, (surface mount, LCC-18).

1.3 Maximum ratings. T_A= +25°C, unless otherwise specified.

Type

P_T(1)

T_C=

+25°C

P_T

T_A=

+25°C

V_DS

V_DG

V_GS

I_D1(3) (4)

T_C=+25°C

I_D2(3) (4)

T_C=

+100°C

I_S

I_DM(5)

A (pk)

T_J

and

T_STG

R _θ

(2)

V dc

A dc

°C/W

°C

2N7494U5

2N7495U5

2N7496U5

1.67

11.7

46.8

5.0

±20

-55

+150

7.4

6.5

100

(1) Derate linearly by 0.2 W/°C for T_C> +25°C.

(2) See figure 2, thermal impedance curves.

(3) The following formula derives the maximum theoretical I_Dlimit. I_Dis limited by package and internal

construction to 12 amps.

T_JMT_C

( on ) at

T_JM

I_D

(

)

(

)

R_θJC

R_DS

(4) See figure 3, maximum drain current graph.

(5) I_DM= 4 X I_D1as calculated in note (3).

Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime,

ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductor@dla.mil. Since contact

information can change, you may want to verify the currency of this address information using the ASSIST

Online database at https://assist.daps.dla.mil/.

AMSC N/A

FSC 5961

12 3 4 5 6 7...25

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