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JANSH2N7481U3

更新时间： 2024-02-24 22:33:03
品牌 Logo 应用领域
英飞凌 - INFINEON 开关脉冲晶体管
页数 文件大小 规格书
22页 190K
描述
Power Field-Effect Transistor, 22A I(D), 100V, 0.06ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, SMD-0.5, 3 PIN

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JANSH2N7481U3 技术参数

是否Rohs认证： 不符合生命周期：Active
包装说明：HERMETIC SEALED, CERAMIC, SMD-0.5, 3 PINReach Compliance Code：unknown
ECCN代码：EAR99风险等级：5.39
雪崩能效等级（Eas）：70 mJ外壳连接：DRAIN
配置：SINGLE WITH BUILT-IN DIODE最小漏源击穿电压：100 V
最大漏极电流 (Abs) (ID)：22 A最大漏极电流 (ID)：22 A
最大漏源导通电阻：0.06 ΩFET 技术：METAL-OXIDE SEMICONDUCTOR
JESD-30 代码：R-CBCC-N3JESD-609代码：e0
元件数量：1端子数量：3
工作模式：ENHANCEMENT MODE最高工作温度：150 °C
封装主体材料：CERAMIC, METAL-SEALED COFIRED封装形状：RECTANGULAR
封装形式：CHIP CARRIER峰值回流温度（摄氏度）：NOT SPECIFIED
极性/信道类型：N-CHANNEL最大功率耗散 (Abs)：75 W
最大脉冲漏极电流 (IDM)：88 A认证状态：Qualified
参考标准：MIL-19500/703子类别：FET General Purpose Power
表面贴装：YES端子面层：Tin/Lead (Sn/Pb)
端子形式：NO LEAD端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED晶体管应用：SWITCHING
晶体管元件材料：SILICONBase Number Matches：1

JANSH2N7481U3 数据手册

 浏览型号JANSH2N7481U3的Datasheet PDF文件第2页浏览型号JANSH2N7481U3的Datasheet PDF文件第3页浏览型号JANSH2N7481U3的Datasheet PDF文件第4页浏览型号JANSH2N7481U3的Datasheet PDF文件第5页浏览型号JANSH2N7481U3的Datasheet PDF文件第6页浏览型号JANSH2N7481U3的Datasheet PDF文件第7页 
INCH-POUND  
The documentation and process conversion  
measures necessary to comply with this revision  
shall be completed by 30 November 2010.  
MIL-PRF-19500/703B  
30 August 2010  
SUPERSEDING  
MIL-PRF-19500/703A  
2 July 2004  
PERFORMANCE SPECIFICATION SHEET  
SEMICONDUCTOR DEVICE, FIELD EFFECT RADIATION HARDENED  
(TOTAL DOSE AND SINGLE EVENT EFFECTS)  
TRANSISTOR, N-CHANNEL, SILICON, TYPES 2N7479U3, 2N7480U3, AND 2N7481U3,  
JANTXVR, F, G, AND H AND JANSR, F, G, AND H  
This specification is approved for use by all Departments  
and Agencies of the Department of Defense.  
The requirements for acquiring the product described herein shall consist of  
this specification sheet and MIL-PRF-19500.  
1. SCOPE  
1.1 Scope. This specification covers the performance requirements for a N-Channel, enhancement-mode,  
MOSFET, radiation hardened (total dose and single event effects (SEE)), power transistor. Two levels of product  
assurance are provided for each device type as specified in MIL-PRF-19500, with avalanche energy maximum rating  
(EAS) and maximum avalanche current (IAS).  
1.2 Physical dimensions. See figure 1, surface mount, TO-276AA (SMD-0.5) for U3.  
*
1.3 Maximum ratings. TA = +25°C, unless otherwise specified.  
Type  
PT (1)  
TC =  
+25°C +25°C  
PT  
TA =  
VDS  
VDG  
VGS  
ID1 (3) (4)  
TC  
=+25°C  
ID2 (3) (4)  
TC =  
+100°C  
IS  
IDM (5)  
A (pk)  
TJ  
and  
TSTG  
RθJC  
(2)  
W
W
°C/W  
V dc  
V dc  
V dc  
A dc  
A dc  
A dc  
°C  
2N7479U3  
2N7480U3  
2N7481U3  
75  
75  
75  
1.0  
1.0  
1.0  
1.67  
1.67  
1.67  
30  
60  
30  
60  
22  
22  
22  
22  
21  
16  
22  
22  
22  
88  
88  
88  
±20  
±20  
±20  
-55  
to  
+150  
100  
100  
(1) Derate linearly by 0.6 W/°C for TC > +25°C.  
(2) See figure 2, thermal impedance curves.  
(3) The following formula derives the maximum theoretical ID limit. ID is limited by package and internal construction.  
-
TJM TC  
( on ) at  
TJM  
=
ID  
(
)
x
(
)
RθJC  
RDS  
(4) See figure 3, maximum drain current graph.  
(5) IDM = 4 X ID1 as calculated in note (3).  
* Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime,  
ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductor@dscc.dla.mil. Since  
contact information can change, you may want to verify the currency of this address information using the  
ASSIST Online database at https://assist.daps.dla.mil/.  
AMSC N/A  
FSC 5961  
1234567...22

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