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JAN1N757AUR-1 PDF预览

JAN1N757AUR-1

更新时间: 2024-11-19 05:23:19
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美高森美 - MICROSEMI 二极管测试
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2页 38K
描述
LEADLESS PACKAGE FOR SURFACE MOUNT

JAN1N757AUR-1 数据手册

 浏览型号JAN1N757AUR-1的Datasheet PDF文件第2页 
1N746AUR-1 THRU 1N759AUR-1 AVAILABLE IN JAN, JANTX AND JANTXV  
PER MIL-PRF-19500/127  
1N746AUR-1 thru 1N759AUR-1  
and  
1N4370AUR-1 thru 1N4372AUR-1  
and  
1N4370AUR-1 THRU 1N4372AUR-1 AVAILABLE IN JAN, JANTX AND JANTXV  
PER MIL-PRF-19500/127  
CDLL746 thru CDLL759A  
and  
• LEADLESS PACKAGE FOR SURFACE MOUNT  
• METALLURGICALLY BONDED  
CDLL4370 thru CDLL4372A  
MAXIMUM RATINGS  
Operating Temperature: -65°C to +175°C  
Storage Temperature: -65°C to +175°C  
DC Power Dissipation: 500 mW @ T  
= +125°C  
= +125°C  
EC  
Power Derating: 10 mW / °C above T  
EC  
Forward Voltage @ 200mA: 1.1 volts maximum  
MILLIMETERS  
INCHES  
ELECTRICAL CHARACTERISTICS @ 25°C  
DIM MIN MAX MIN MAX  
CDI  
TYPE  
NOMINAL  
ZENER  
ZENER  
TEST  
MAXIMUM  
ZENER  
MAXIMUM  
MAXIMUM  
ZENER  
D
F
1.60  
0.41  
3.30  
1.70 0.063 0.067  
0.55 0.016 0.022  
3.70 .130 .146  
REVERSE CURRENT  
NUMBER  
VOLTAGE  
CURRENT IMPEDANCE  
(NOTE 3)  
CURRENT  
G
G1  
S
2.54 REF.  
0.03 MIN.  
.100 REF.  
.001 MIN.  
(NOTE 1)  
V
@ 1  
ZT  
1
Z
@ 1  
ZT  
I
@ V  
1
Z
ZT  
ZT  
R
R
ZM  
(NOTE 2)  
VOLTS  
mA  
OHMS  
µ A  
VOLTS  
mA  
CDLL4370A  
CDLL4371A  
CDLL4372A  
2.4  
2.7  
3.0  
20  
20  
20  
30  
30  
29  
100  
60  
1.0  
1.0  
1.0  
155  
140  
125  
FIGURE 1  
30  
DESIGN DATA  
CDLL746A  
CDLL747A  
CDLL748A  
3.3  
3.6  
3.9  
20  
20  
20  
28  
24  
23  
5
3
2
1.0  
1.0  
1.0  
120  
110  
100  
CASE: DO-213AA, Hermetically sealed  
glass case. (MELF, SOD-80, LL34)  
CDLL749A  
CDLL750A  
CDLL751A  
4.3  
4.7  
5.1  
20  
20  
20  
22  
19  
17  
2
5
5
1.0  
1.5  
2.0  
90  
85  
75  
LEAD FINISH: Tin / Lead  
THERMAL RESISTANCE: (R  
):  
OJEC  
100 °C/W maximum at L = 0 inch  
CDLL752A  
CDLL753A  
CDLL754A  
5.6  
6.2  
6.8  
20  
20  
20  
11  
7
5
5
2
2.5  
3.5  
4.0  
70  
65  
60  
5
THERMAL IMPEDANCE: (Z  
°C/W maximum  
): 25  
OJX  
CDLL755A  
CDLL756A  
CDLL757A  
7.5  
8.2  
9.1  
20  
20  
20  
6
8
2
1
1
5.0  
6.0  
7.0  
55  
50  
45  
POLARITY: Diode to be operated with  
10  
the banded (cathode) end positive.  
CDLL758A  
CDLL759A  
10.0  
12.0  
20  
20  
17  
30  
1
1
8.0  
9.0  
40  
35  
MOUNTING POSITION: Any.  
NOTE 1  
NOTE 2  
NOTE 3  
Zener voltage tolerance on "A" suffix is +5%. No Suffix denotes + 10% tolerance.  
"C" suffix denotes + 2% tolerance and "D" suffix denotes + 1% tolerance.  
MOUNTING SURFACE SELECTION:  
The Axial Coefficient of Expansion  
(COE) Of this Device is Approximately  
+6PPM/°C. The COE of the Mounting  
Surface System Should Be Selected To  
Provide A Suitable Match With This  
Device.  
Zener voltage is measured with the device junction in thermal equilibrium at an ambient  
temperature of 25°C, +3°C.  
Zener impedance is derived by superimposing on 1  
A 60Hz rms a.c. current equal  
ZT  
to 10% of 1  
.
ZT  
6 LAKE STREET, LAWRENCE, MASSACHUSETTS 01841  
PHONE (978) 620-2600  
FAX (978) 689-0803  
WEBSITE: http://www.microsemi.com  
93  

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