N-Channel JFET
J109, MMBFJ108
Features
• This Device is Designed for Digital Switching Applications where
Very Low On Resistance is Mandatory
• Sourced from Process 58
www.onsemi.com
• These are Pb−Free Devices
MAXIMUM RATINGS (T = 25°C unless otherwise specified) (Notes 1, 2)
A
Symbol
Parameter
Drain−Gate Voltage
Value
25
Unit
V
V
V
DG
GS
GF
Gate−Source Voltage
−25
V
1
I
Forward Gate Current
10
mA
°C
TO−92 3 4.825x4.76
T , T
Operating and Storage Junction
Temperature Range
−55 to 150
J
STG
CASE 135AN
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. These ratings are based on a maximum junction temperature of 150°C.
2. These are steady−state limits. ON Semiconductor should be consulted on
applications involving pulsed or low−duty−cycle operations.
1
THERMAL CHARACTERISTICS (T = 25°C unless otherwise specified)
A
TO−92 3 4.83x4.76
LEADFORMED
CASE 135AR
Max
J109
(Note 3)
MMBFJ108
(Note 4)
Symbol
Parameter
Unit
mW
P
D
Total Device Dissipation
Derate Above 25°C
625
5.0
350
2.8
−
3
mW/°C
°C/W
1
R
Thermal Resistance,
Junction−to−Case
125
q
JC
JA
2
SOT−23/SUPERSOTt−23,
R
Thermal Resistance,
Junction−to−Ambient
200
357
°C/W
q
3 LEAD, 1.4x2.9
CASE 527AG
3. PCB size: FR−4, 76 mm x 114 mm x 1.57 mm (3.0 inch x 4.5 inch x 0.062 inch)
with minimum land pattern size.
1. Drain, 2. Source, 3. Gate
4. Device mounted on FR−4 PCB 36 mm x 18 mm x 1.5 mm; mounting pad for
2
the collector lead minimum 6 cm .
MARKING DIAGRAM
$Y&Z&3&K
J109
$Y&Z&3
J109
&Y
I8 &G
J109
J109−D26Z
MMBFJ108
J109, I8 = Specific Device Code
$Y
&Y
&G
&Z
&3
&K
= ON Semiconductor Logo
= Year Coding
= Weekly Date Code
= Assembly Plant Code
= Date Code Format
= Lot Run Traceability Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of
this data sheet.
© Semiconductor Components Industries, LLC, 2002
1
Publication Order Number:
December, 2020 − Rev. 4
J109/D