Datasheet > IZ74LV164

IZ74LV164

更新时间： 2024-09-14 22:08:03

品牌	Logo	应用领域
INTEGRAL		移位寄存器
页数	文件大小	规格书
6页	49K
描述
8-BIT SERIAL-IN/PARALLEL-OUT SHIFT REGISTER

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数据手册

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IZ74LV164 数据手册

TECHNICAL DATA

IN74LV164

8-BIT SERIAL-IN/PARALLEL-OUT SHIFT REGISTER

The IN74LV164 is a low-voltage Si-gate CMOS device and is pin

and function compatible with the IN74HC/HCT164.

N SUFFIX

PLASTIC DIP

The IN74LV164 is an 8-bit edge-triggered shift register with serial

data entry and an output from each of the eight stages. Data is entered

serially through one of two inputs (DSA or DSB); either input can be

used as an active HIGH enable for data entry through the other input.

Both inputs must be connected together or an unused input must be tied

HIGH.

Data shifts one place to the right on each LOW-to-HIGH transition

of the clock (CP) input and enters into Q₀, which is the logical AND of

the two data inputs (DSA, DSB ) that existed one set-up time prior to the

rising clock edge.

D SUFFIX

ORDERING INFORMATION

IN74LV164N

IN74LV164D

IZ74LV164

Plastic DIP

SOIC

chip

A LOW on the master reset (MR) input overrides all other inputs

and clears the register asynchronously, forcing all outputs LOW.

T_A= -40° to 125° C for all packages

Outputs Directly Interface to CMOS, NMOS, and TTL

Operating Voltage Range: 1.2 to 5.5 V

Low Input Current: 1.0 mA, 0.1 mÀ at Ò = 25 °Ñ

Output Current: 6 mA at V_CC= 3.0 V; 12 mA at V_CC= 4.5 V

High Noise Immunity Characteristic of CMOS Devices

PIN ASSIGNMENT

DSA

DSB

14 V_CC

13 Q7

12 Q6

LOGIC DIAGRAM

10 Q4

SERIAL

DATA

INPUTS DSB

DSA

DATA

GND

PARALLEL

DATA

OUTPUTS

FUNCTION TABLE

Inputs

Outputs

DSA DSB Q0 Q1 ... Q7

L … L

Q0 ... Q6

PIN 14=V_CC

PIN 7 = GND

H = high voltage level

L = low voltage level

X = don’t care

INTEGRAL

12 3 4 5 6

中文翻译

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与IZ74LV164相关器件

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