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IXDP610PIB PDF预览

IXDP610PIB

更新时间: 2024-09-23 13:08:55
品牌 Logo 应用领域
IXYS 控制器
页数 文件大小 规格书
8页 184K
描述
Analog Circuit, PDIP18, SLIM, PLASTIC, DIP-18

IXDP610PIB 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:18
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.83模拟集成电路 - 其他类型:ANALOG CIRCUIT
JESD-30 代码:R-PDIP-T18长度:22.606 mm
端子数量:18最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:3.94 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
温度等级:INDUSTRIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

IXDP610PIB 数据手册

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IXDP 610  
Bus Compatible Digital PWM Controller, IXDP 610  
Description  
The IXDP610 Digital Pulse Width  
Modulator (DPWM) is a programmable  
CMOS LSI device which accepts digital  
pulse width data from a microprocessor  
and generates two complementary,  
non-overlapping, pulse width modula-  
ted signals for direct digital control of  
switching power bridge. The DPWM is  
designed to be operated under the  
direct control of a microprocessor and  
interfaces easily with most standard  
microprocessor and microcomputer  
buses. The IXDP610 is packaged in an  
18-Pin slim DP.  
sinking and sourcing 20 mA at TTL  
voltage levels. The Output Disable  
logic can be activated either by  
software or hardware. This facilitates  
cycle-by-cycle current-limit, short-  
circuit, over-temperature, and  
Features  
G Microcomputer bus compatible  
G Two complementary outputs for  
direct control of a switching power  
bridge  
desaturation protection schemes.  
G Dynamically programmable pulse  
width ranges from 0 to 100 %  
The IXDP610 is capable of operating at  
PWM frequencies from zero to 390kHz;  
the dead-time is programmable from  
zero to 14 clock cycles (0 to 11 % of  
the PWM cycle), which allows  
G Two modes of operation: 7-bit or 8-  
bit resolution  
G Switching frequency range up to  
390 kHz  
operation with fast power MOSFETs,  
IGBTs, and bipolar power transistors. A  
trade-off between PWM frequency and  
resolution is provided by selecting the  
counter resolution to be 7-bit or 8-bit.  
The 20 mA output drive makes the  
IXDP610 capable of directly driving  
opto isolators and Smart Power  
G Programmable Dead-time Counter  
prevents switching overlap  
The PWM waveform generated by the  
IXDP610 results from comparing the  
output of the Pulse Width counter to  
the number stored in the Pulse Width  
Latch (see below). A programmable  
"dead-time" is incorporated into the  
PWM waveform. The Dead-Time Logic  
disables both outputs on each  
G Cycle-by-Cycle disable input to  
protect against over-current, over-  
temperature, etc.  
G Outputs may be disabled under  
software control  
devices. The fast response to pulse  
width commands is achieved by  
G Special locking bit prevents damage  
to the stage in the event of a  
software failure  
transition of the Comparator output for  
the required dead-time interval.  
instantaneous change of the outputs to  
correspond to the new command. This  
eliminates the one-cycle delay usually  
associated with other digital PWM  
implementations.  
G 18-pin slim DIP package  
The output stage provides complemen-  
tary PWM output signals capable of  
Dimensions in inch and mm  
18-Pin Slim DIP  
Symbol  
Definition  
Maximum Ratings  
VCC  
VIN  
Supply voltage  
Input voltage  
Output voltage  
-0.3 ... 5.5  
-0.3 ... VCC + 0.3  
-0.3 ... VCC + 0.3  
V
V
V
Vout  
PD  
Maximum power dissipation  
Storage temperature range  
500 mW  
-40 ... 125 °C  
Tstg  
© 2001 IXYS/DEI All rights reserved  
1

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