Datasheet > IW4520BN

IW4520BN

更新时间： 2024-11-14 05:39:55

品牌	Logo	应用领域
IKSEMICON		计数器高压栅
页数	文件大小	规格书
6页	267K
描述
Dual Up-Counter High-Voltage Silicon-Gate CMOS

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IW4520BN 数据手册

TECHNICAL DATA

IW4520B

Dual Up-Counter

High-Voltage Silicon-Gate CMOS

The IW4520B Dual Binary Up-Counter consists two identical,

internally synchronous 4-stage counters. The counter stages are D-type

flip-flops having interchangeable CLOCK and ENABLE lines for

incrementing on either the positive-going or negative-going transition. For

single-unit operation the ENABLE input is maintained high and the

counter advances on each positive-going transition of the CLOCK. The

counters are cleared by high levels on their RESET lines.

The counter can be cascaded in the ripple mode by connecting Q4 to

the enable input of the subsequent counter while the CLOCK input of the

latter is held low.

ORDERING INFORMATION

IW4520BN Plastic

IW4520BD SOIC

T_A= -55° to 125° C for all packages

•

Operating Voltage Range: 3.0 to 18 V

Maximum input current of 1 μA at 18 V over full package-temperature

range; 100 nA at 18 V and 25°C

•

Noise margin (over full package temperature range):

1.0 V min @ 5.0 V supply

2.0 V min @ 10.0 V supply

2.5 V min @ 15.0 V supply

PIN ASSIGNMENT

LOGIC DIAGRAM

FUNCTION TABLE

Inputs

CLOCK ENABLE RESET

Outputs

Mode

Increment Counter

No Change

PIN 16=V_CC

PIN 8= GND

No Change

Q1 thru Q4=L

X = don’t care

Rev. 00

12 3 4 5 6

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