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IW4071B PDF预览

IW4071B

更新时间: 2024-11-30 05:39:55
品牌 Logo 应用领域
IKSEMICON 高压
页数 文件大小 规格书
5页 165K
描述
Quad 2-Input OR Gate High-Voltage Silicon-Gate CMOS

IW4071B 数据手册

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TECHNICAL DATA  
IW4071B  
Quad 2-Input OR Gate  
High-Voltage Silicon-Gate CMOS  
The IW4071B OR gates provide the system designer wich direct  
emplementation of the positive-logic OR function.  
Operating Voltage Range: 3.0 to 18 V  
Maximum input current of 1 μA at 18 V over full package-temperature  
range; 100 nA at 18 V and 25°C  
Noise margin (over full package temperature range):  
1.0 V min @ 5.0 V supply  
2.0 V min @ 10.0 V supply  
2.5 V min @ 15.0 V supply  
ORDERING INFORMATION  
IW4071BN Plastic  
IW4071BD SOIC  
TA = -55° to 125° C for all packages  
LOGIC DIAGRAM  
PIN ASSIGNMENT  
FUNCTION TABLE  
Inputs  
Output  
PIN 14 =VCC  
PIN 7 = GND  
A
L
B
L
Y
L
L
H
L
H
H
H
H
H
H
Rev. 00  

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