Datasheet > IW4052B

IW4052B

更新时间： 2024-11-30 05:39:55

品牌	Logo	应用领域
IKSEMICON		解复用器栅
页数	文件大小	规格书
7页	269K
描述
Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS

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IW4052B 数据手册

TECHNICAL DATA

IW4052B

Analog Multiplexer Demultiplexer

High-Performance Silicon-Gate CMOS

N SUFFIX

PLASTIC

The IW4052B analog multiplexer/demultiplexer is digitally controlled

analog switches having low ON impedance and very low OFF leakage

current. Control of analog signals up to 20V peak-to-peak can be

achieved by digital signal amplitudes of 4.5 to 20V (if V_CC- GND = 3V,

a V_CC- V_EEof up to 13 V can be controlled; for V_CC- V_EElevel

differences above 13V a V_CC- GND of at least 4.5V is required).

These multiplexer circuits dissipate extremely low quiescent power

over the full V_CC-GND and V_CC- V_EEsupply-voltage ranges,

independent of the logic state of the control signals. When a logic “1”is

present at the ENABLE input terminal all channels are off.

D SUFFIX

SOIC

ORDERING INFORMATION

IW4052BN

IW4052BD

Plastic DIP

SOIC

T_A= -55° to 125° C for all packages

The IW4052 is a differential 4-channel multiplexer having two binary

control inputs. A and B, and an enable input. The two binary input signals

select 1 of 4 pairs of channels to turned on and connect the analog inputs

to the outputs.

•

Operating Voltage Range: 3.0 to 18 V

Maximum input current of 1μA at 18 V over full package-temperature

range; 100 nA at 18 V and 25°C

PIN ASSIGNMENT

Noise margin (over full package temperature range):

1.0 V min @ 5.0 V supply

2.0 V min @ 10.0 V supply

2.5 V min @ 15.0 V supply

LOGIC DIAGRAM

Double-Pole, 4-Position

Plus Common Off

FUNCTION TABLE

Control Inputs

Enable Select

Channels

None

PIN 16 =V_CC

PIN 7 = V_EE

PIN 8 = GND

H = high level

L = low level

X = don’t care

Rev. 00

12 3 4 5 6 7

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