Datasheet > IW4020BD

IW4020BD

更新时间： 2024-11-29 05:39:55

品牌	Logo	应用领域
IKSEMICON		计数器高压栅
页数	文件大小	规格书
6页	228K
描述
14 Stage Ripple-Carry Binary Counter/Divider High-Voltage Silicon-Gate CMOS

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数据手册

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IW4020BD 数据手册

TECHNICAL DATA

IW4020B

14 Stage Ripple-Carry Binary

Counter/Divider

High-Voltage Silicon-Gate CMOS

N SUFFIX

PLASTIC DIP

The IW4020B is ripple-carry binary counter. All counter stages are master-

slave flip-flops. The state of a counter advances one count on the negative

transition of each input pulse; a high level on the RESET line resets the counter

to its all zeros state. Schmitt trigger action on the input-pulse line permits

unlimited rise and fall times.

•

Operating Voltage Range: 3.0 to 18 V

Maximum input current of 1 μA at 18 V over full package-temperature

range; 100 nA at 18 V and 25°C

ORDERING INFORMATION

•

Noise margin (over full package temperature range):

IW4020BN Plastic DIP

IW4020BD SOIC

1.0 V min @ 5.0 V supply

2.0 V min @ 10.0 V supply

2.5 V min @ 15.0 V supply

T_A= -55° to 125° C for all packages

LOGIC DIAGRAM

PIN ASSIGNMENT

CLOCK

Q10

Q11

Q12

FUNCTION TABLE

Inputs

Clock

Output

Q13

Q14

Reset

Output state

No change

Advance to next

state

RESET

All Outputs are low

PIN 16 =V_CC

PIN 8 = GND

H= high level

L = low level

X=don’t care

Rev. 00

12 3 4 5 6

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