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IVA-05208-STR PDF预览

IVA-05208-STR

更新时间： 2024-09-16 22:16:27
品牌 Logo 应用领域
安捷伦 - AGILENT 射频和微波射频放大器微波放大器
页数 文件大小 规格书
4页 65K
描述
Silicon Bipolar MMIC 1.5 GHz Variable Gain Amplifier

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中文翻译

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IVA-05208-STR 技术参数

生命周期：ObsoleteReach Compliance Code：unknown
风险等级：5.09Is Samacsys：N
其他特性：HIGH RELIABILITY特性阻抗：50 Ω
构造：COMPONENT增益：25 dB
最大输入功率 (CW)：14 dBm最大工作频率：1500 MHz
最小工作频率：射频/微波设备类型：WIDE BAND LOW POWER
最大电压驻波比：2.5Base Number Matches：1

IVA-05208-STR 数据手册

 浏览型号IVA-05208-STR的Datasheet PDF文件第2页浏览型号IVA-05208-STR的Datasheet PDF文件第3页浏览型号IVA-05208-STR的Datasheet PDF文件第4页 
Silicon Bipolar MMIC 1.5 GHz  
Variable Gain Amplifier  
Technical Data  
IVA-05208  
Features  
• Differential Input and  
Output Capability  
• DC to 1.5 GHz Bandwidth;  
2.0 Gb/s Data Rates  
• High Gain: 30 dB Typical  
• Wide Gain Control Range:  
30 dBTypical  
• 5 V Bias  
• 5 V Vgc Control Voltage,  
Igc␣␣ꢀmA  
Description  
SO-8 Package  
The IVA-05208 is a variable gain  
amplifier housed in a miniature  
low cost plastic surface mount  
package. This device can be used  
in any combination of single-  
ended or differential inputs or  
outputs (see Functional Block  
Diagram). The lowest frequency  
of operation is limited only by the  
values of user selected blocking  
and bypass capacitors.  
PIN 1  
The IVA series of variable gain  
amplifiers is fabricated using HP’s  
10 GHz fT, 25 GHz fMAX  
• Fast Gain Control Response:  
ISOSAT™-I silicon bipolar  
<10nsTypical  
• Low Cost Plastic Surface  
Mount Package  
Typical applications include  
variable gain amplification for  
fiber optic systems (e.g., SONET)  
with data rates up to 2.0 Gb/s,  
mobile radio and satellite  
process. This process uses nitride  
self-alignment, submicrometer  
lithography, trench isolation, ion  
implantation, gold metallization  
and polyimide inter-metal  
receivers, millimeter wave  
receiver IF amplifiers and  
communication receivers.  
dielectric and scratch protection  
to achieve excellent performance,  
uniformity and reliability.  
Typical Biasing Configuration and Functional Block Diagram  
Differential Input/Differential Output  
Single Ended Input/Single Ended Output  
C
C
C
C
bypass  
bypass  
block  
block  
1
2
8
7
1
2
8
7
Input  
Input  
V
V
gc  
gc  
50 Ω*  
Output –  
V
= 0 V  
V
= 0 V  
C
C
C
ee  
ee  
block  
block  
3
4
6
5
3
4
6
5
Output +  
= 5 V  
Output +  
= 5 V  
CC  
C
C
block  
V
block  
V
C
Input  
bypass  
CC  
C
C
block  
bypass  
bypass  
C
= 1000 pF typical  
* Optional: For Single-Ended Output operation, Pin 7  
may be left unterminated (no C or 50 Ω)  
bypass  
block  
Good grounding of Pins 2, 3 is critical for proper  
operation and good VSWR performance of this part.  
6-177  
5965-9682E  
1234

中文翻译

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