5秒后页面跳转
ISPLSI2128VE-135LT176 PDF预览

ISPLSI2128VE-135LT176

更新时间: 2024-10-28 22:25:11
品牌 Logo 应用领域
莱迪思 - LATTICE /
页数 文件大小 规格书
19页 235K
描述
3.3V In-System Programmable SuperFAST⑩ High Density PLD

ISPLSI2128VE-135LT176 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFP
包装说明:TQFP-176针数:176
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.76
其他特性:YES最大时钟频率:100 MHz
系统内可编程:YESJESD-30 代码:S-PQFP-G176
JESD-609代码:e0JTAG BST:NO
长度:24 mm湿度敏感等级:3
专用输入次数:4I/O 线路数量:128
宏单元数:128端子数量:176
最高工作温度:70 °C最低工作温度:
组织:4 DEDICATED INPUTS, 128 I/O输出函数:MACROCELL
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP176,1.0SQ,20封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):225
电源:3.3 V可编程逻辑类型:EE PLD
传播延迟:10 ns认证状态:Not Qualified
座面最大高度:1.6 mm子类别:Programmable Logic Devices
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:24 mm
Base Number Matches:1

ISPLSI2128VE-135LT176 数据手册

 浏览型号ISPLSI2128VE-135LT176的Datasheet PDF文件第2页浏览型号ISPLSI2128VE-135LT176的Datasheet PDF文件第3页浏览型号ISPLSI2128VE-135LT176的Datasheet PDF文件第4页浏览型号ISPLSI2128VE-135LT176的Datasheet PDF文件第5页浏览型号ISPLSI2128VE-135LT176的Datasheet PDF文件第6页浏览型号ISPLSI2128VE-135LT176的Datasheet PDF文件第7页 
®
ispLSI 2128VE  
3.3V In-System Programmable  
SuperFAST™ High Density PLD  
Features  
Functional Block Diagram*  
• SuperFAST HIGH DENSITY IN-SYSTEM  
PROGRAMMABLE LOGIC  
— 6000 PLD Gates  
Output Routing Pool (ORP)  
D7 D6  
D5  
D4  
Output Routing Pool (ORP)  
D2  
D1  
D0  
D3  
— 128 and 64 I/O Pin Versions, Eight Dedicated Inputs  
— 128 Registers  
A0  
A1  
C7  
C6  
— High Speed Global Interconnect  
— Wide Input Gating for Fast Counters, State  
Machines, Address Decoders, etc.  
— Small Logic Block Size for Random Logic  
— 100% Functional, JEDEC and Pinout Compatible  
with ispLSI 2128V Devices  
D
Q
Q
Q
Q
A2  
A3  
C5  
C4  
D
D
D
Logic  
Array  
A4  
A5  
C3  
C2  
GLB  
• 3.3V LOW VOLTAGE 2128 ARCHITECTURE  
— Interfaces with Standard 5V TTL Devices  
• HIGH PERFORMANCE E2CMOS® TECHNOLOGY  
fmax = 250MHz Maximum Operating Frequency  
tpd = 4.0ns Propagation Delay  
A6  
A7  
C1  
C0  
Global Routing Pool (GRP)  
— Electrically Erasable and Reprogrammable  
— Non-Volatile  
B0  
B1  
B2  
B3  
B5  
B6  
B7  
B4  
Output Routing Pool (ORP)  
Output Routing Pool (ORP)  
— 100% Tested at Time of Manufacture  
— Unused Product Term Shutdown Saves Power  
0139A/2128VE  
*128 I/O Version Shown  
• IN-SYSTEM PROGRAMMABLE  
— 3.3V In-System Programmability (ISP™) Using  
Boundary Scan Test Access Port (TAP)  
Description  
The ispLSI 2128VE is a High Density Programmable  
Logic Device available in 128 and 64 I/O-pin versions.  
The device contains 128 Registers, eight Dedicated  
Input pins, three Dedicated Clock Input pins, two dedi-  
cated Global OE input pins and a Global Routing Pool  
(GRP). The GRP provides complete interconnectivity  
between all of these elements. The ispLSI 2128VE  
features in-system programmability through the Bound-  
ary Scan Test Access Port (TAP) and is 100% IEEE  
1149.1 Boundary Scan Testable. The ispLSI 2128VE  
offers non-volatile reprogrammability of the logic, as well  
as the interconnect to provide truly reconfigurable sys-  
tems.  
— Open-Drain Output Option for Flexible Bus Interface  
Capability, Allowing Easy Implementation of Wired-  
OR Bus Arbitration Logic  
— Increased Manufacturing Yields, Reduced Time-to-  
Market and Improved Product Quality  
— Reprogram Soldered Devices for Faster Prototyping  
• 100% IEEE 1149.1 BOUNDARY SCAN TESTABLE  
• THE EASE OF USE AND FAST SYSTEM SPEED OF  
PLDs WITH THE DENSITY AND FLEXIBILITY OF FPGAS  
— Enhanced Pin Locking Capability  
— Three Dedicated Clock Input Pins  
— Synchronous and Asynchronous Clocks  
— Programmable Output Slew Rate Control  
— Flexible Pin Placement  
— Optimized Global Routing Pool Provides Global  
Interconnectivity  
The basic unit of logic on the ispLSI 2128VE device is the  
Generic Logic Block (GLB). The GLBs are labeled A0, A1  
.. D7 (see Figure 1). There are a total of 32 GLBs in the  
ispLSI 2128VE device. Each GLB is made up of four  
macrocells. Each GLB has 18 inputs, a programmable  
AND/OR/ExclusiveORarray, andfouroutputswhichcan  
be configured to be either combinatorial or registered.  
Inputs to the GLB come from the GRP and dedicated  
inputs. All of the GLB outputs are brought back into the  
GRP so that they can be connected to the inputs of any  
GLB on the device.  
• ispDesignEXPERT™ – LOGIC COMPILER AND COM-  
PLETE ISP DEVICE DESIGN SYSTEMS FROM HDL  
SYNTHESIS THROUGH IN-SYSTEM PROGRAMMING  
— Superior Quality of Results  
— Tightly Integrated with Leading CAE Vendor Tools  
— Productivity Enhancing Timing Analyzer, Explore  
Tools, Timing Simulator and ispANALYZER™  
— PC and UNIX Platforms  
Copyright©2000LatticeSemiconductorCorp. Allbrandorproductnamesaretrademarksorregisteredtrademarksoftheirrespectiveholders. Thespecificationsandinformationhereinaresubject  
to change without notice.  
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.  
Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com  
September 2000  
2128ve_08  
1

ISPLSI2128VE-135LT176 替代型号

型号 品牌 替代类型 描述 数据表
ISPLSI2128VE-180LT176 LATTICE

完全替代

3.3V In-System Programmable SuperFAST⑩ High D
ISPLSI2128VE-100LTN176 LATTICE

类似代替

3.3V In-System Programmable SuperFAST™ High
ISPLSI2128VE-250LT176 LATTICE

类似代替

3.3V In-System Programmable SuperFAST⑩ High D

与ISPLSI2128VE-135LT176相关器件

型号 品牌 获取价格 描述 数据表
ISPLSI2128VE135LT176I LATTICE

获取价格

3.3V In-System Programmable SuperFAST⑩ High D
ISPLSI2128VE-135LT176I LATTICE

获取价格

3.3V In-System Programmable SuperFAST⑩ High D
ISPLSI2128VE135LTN100 LATTICE

获取价格

3.3V In-System Programmable SuperFAST⑩ High D
ISPLSI2128VE-135LTN100 LATTICE

获取价格

3.3V In-System Programmable SuperFAST™ High
ISPLSI2128VE135LTN100I LATTICE

获取价格

3.3V In-System Programmable SuperFAST⑩ High D
ISPLSI2128VE135LTN176 LATTICE

获取价格

3.3V In-System Programmable SuperFAST⑩ High D
ISPLSI2128VE-135LTN176 LATTICE

获取价格

3.3V In-System Programmable SuperFAST™ High
ISPLSI2128VE135LTN176I LATTICE

获取价格

3.3V In-System Programmable SuperFAST⑩ High D
ISPLSI2128VE-135LTN176I LATTICE

获取价格

3.3V In-System Programmable SuperFAST™ High
ISPLSI2128VE180LB100 LATTICE

获取价格

3.3V In-System Programmable SuperFAST⑩ High D