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ISO7220ADG4 PDF预览

ISO7220ADG4

更新时间: 2024-01-04 18:43:17
品牌 Logo 应用领域
德州仪器 - TI 驱动程序和接口接口集成电路光电二极管
页数 文件大小 规格书
25页 735K
描述
DUAL DIGITAL ISOLATORS

ISO7220ADG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP,针数:8
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:12 weeks风险等级:1.15
接口集成电路类型:INTERFACE CIRCUITJESD-30 代码:R-PDSO-G8
JESD-609代码:e4长度:4.905 mm
湿度敏感等级:1功能数量:1
端子数量:8最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.75 mm
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.895 mm
Base Number Matches:1

ISO7220ADG4 数据手册

 浏览型号ISO7220ADG4的Datasheet PDF文件第2页浏览型号ISO7220ADG4的Datasheet PDF文件第3页浏览型号ISO7220ADG4的Datasheet PDF文件第4页浏览型号ISO7220ADG4的Datasheet PDF文件第5页浏览型号ISO7220ADG4的Datasheet PDF文件第6页浏览型号ISO7220ADG4的Datasheet PDF文件第7页 
ISO7220A, ISO7220C, ISO7220M  
ISO7221A, ISO7221C, ISO7221M  
www.ti.com  
SLLS755FJULY 2006REVISED AUGUST 2007  
DUAL DIGITAL ISOLATORS  
FEATURES  
Operates with 3.3-V or 5-V Supplies  
4 kV ESD Protection  
1, 25, and 150-Mbps Signaling Rate Options  
Low Channel-to-Channel Output Skew;  
1 ns max  
High Electromagnetic Immunity  
–40°C to 125°C Operating Range  
Low Pulse-Width Distortion (PWD);  
1 ns max  
APPLICATIONS  
Industrial Fieldbus  
Low Jitter Content; 1 ns Typ at 150 Mbps  
Modbus  
Profibus™  
DeviceNet™ Data Buses  
Typical 25-Year Life at Rated Voltage  
(see app. note SLLA197 and Figure 19)  
4000-Vpeak Isolation, 560 V peak VIORM  
Computer Peripheral Interface  
Servo Control Interface  
Data Acquisition  
UL 1577, IEC 60747-5-2 (VDE 0884, Rev 2),  
IEC 61010-1  
50 kV/μs Typical Transient Immunity  
DESCRIPTION  
The ISO7220 and ISO7221 are dual-channel digital isolators. To facilitate PCB layout, the channels are oriented  
in the same direction in the ISO7220 and in opposite directions in the ISO7221. These devices have a logic  
input and output buffer separated by TI’s silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up  
to 4000 V. Used in conjunction with isolated power supplies, these devices block high voltage, isolate grounds,  
and prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or  
damaging sensitive circuitry.  
A binary input signal is conditioned, translated to a balanced signal, then differentiated by the capacitive isolation  
barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets  
or resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to  
ensure the proper dc level of the output. If this dc-refresh pulse is not received every 4 μs, the input is assumed  
to be unpowered or not being actively driven, and the failsafe circuit drives the output to a logic high state.  
The small capacitance and resulting time constant provide very fast operation with signaling rates available from  
0 Mbps (DC) to 150 Mbps.(1)The A- and C-option devices have TTL input thresholds and a noise filter at the  
input that prevents transient pulses from being passed to the output of the device. The M-option devices have  
CMOS Vcc/2 input thresholds and do not have the input noise-filter and the additional propagation delay.  
These devices require two supply voltages of 3.3 V, 5 V, or any combination. All inputs are 5-V tolerant when  
supplied from a 3.3-V supply and all outputs are 4-mA CMOS.  
These devices are characterized for operation over the ambient temperature range of –40°C to 125°C.  
ISO7221xD  
ISO7220xD  
1
2
3
4
8
7
6
5
VCC1  
OUTA  
INB  
VCC2  
1
2
3
4
8
7
6
5
VCC1  
INA  
INB  
VCC2  
INA  
OUTA  
OUTB  
GND2  
OUTB  
GND2  
GND1  
GND1  
(1) The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
DeviceNet is a trademark of Open DeviceNet Vendors Association.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2006–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

ISO7220ADG4 替代型号

型号 品牌 替代类型 描述 数据表
ISO7220ADR TI

完全替代

DUAL DIGITAL ISOLATORS
ISO7220MD TI

类似代替

DUAL DIGITAL ISOLATORS
ISO7220AD TI

类似代替

DUAL DIGITAL ISOLATORS

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