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ISLA224S20

更新时间： 2024-11-22 14:57:43
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瑞萨 - RENESAS /
页数 文件大小 规格书
38页 2334K
描述
Dual 14-Bit, 200MSPS JESD204B High Speed Serial Output ADC

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DATASHEET  
ISLA224S  
FN7911  
Rev 2.00  
April 25, 2013  
Dual 14-Bit, 250/200/125 MSPS JESD204B High Speed Serial Output ADC  
The ISLA224S is a series of low-power, high-performance,  
Features  
dual-channel 14-bit, analog-to-digital converters. Designed  
• JESD204A/B High Speed Data Interface  
with FemtoCharge™ technology on a standard CMOS process,  
the series supports sampling rates of up to 250MSPS. The  
ISLA224S is part of a pin-compatible family of 12- and 14-bit  
dual-channel A/Ds with maximum sample rates ranging from  
125MSPS to 250MSPS and shares the same analog core as  
Intersil's proven ISLA224P series of ADCs. The family  
minimizes power consumption while providing state-of-the art  
dynamic performance, offering an optimal performance-vs-  
power trade-off.  
- JESD204A Compliant  
- JESD204B Device Subclass 0 Compliant  
- JESD204B Device Subclass 2 Compatible  
- Up to 3 JESD204 Output Lanes Running up to 4.375Gbps  
- Highly Configurable JESD204 Transmitter  
• Multiple Chip Time Alignment and Deterministic Latency  
Support (JESD204B Device Subclass 2)  
• SPI Programmable Debugging Features and Test Patterns  
• 48-pin QFN 7mmx7mm Package  
Differentiating the ISLA224S from the ISLA224P is its highly  
configurable, JESD204B-compliant, high speed serial output  
link. The link offers data rates up to 4.375Gbps per lane and  
multiple packing modes. It can be configured to use two or  
three lanes to transmit the conversion data, allowing for  
flexibility in the receiver design. The SERDES transmitter also  
provides deterministic latency and multi-chip time alignment  
support to satisfy an application's complex synchronization  
requirements.  
Key Specifications  
• SNR @ 250/200/125MSPS  
73.2/74.1/75.1 dBFS f = 30MHz  
IN  
72.4/72.9/73.2 dBFS f = 190MHz  
IN  
• SFDR @ 250/200/125MSPS  
A serial peripheral interface (SPI) port allows for extensive  
configurability of the JESD204B transmitter including access  
to its built-in link and transport-layer test patterns. The SPI port  
also provides control for numerous additional features  
including the fine gain and offset adjustments of the two ADC  
cores as well as the programmable clock divider, enabling 2x  
and 4x harmonic clocking.  
82/91/94 dBc f = 30MHz  
IN  
84/82/81 dBc f = 190MHz  
IN  
• Total Power Consumption: 989mW @ 250MSPS  
Applications  
The ISLA224S is available in a space-saving 7mmx7mm 48 Ld  
QFN package. The package features a thermal pad for  
improved thermal performance and is specified over the full  
industrial temperature range (-40°C to +85°C).  
• Radar and Satellite Antenna Array Processing  
• Broadband Communications and Microwave Receivers  
• High-Performance Data Acquisition  
• Communications Test Equipment  
• High-Speed Medical Imaging  
Pin-Compatible Family  
SPEED  
PRODUCT  
MODEL  
ISLA224S25  
ISLA224S20  
ISLA224S12  
ISLA222S25  
ISLA222S20  
ISLA222S12  
RESOLUTION  
(MSPS)  
AVAILABILITY  
14  
14  
14  
12  
12  
12  
250  
200  
125  
250  
200  
125  
Now  
Now  
Now  
Now  
Now  
Now  
FIGURE 1. SERDES DATA EYE AT 4.375Gbps  
FN7911 Rev 2.00  
April 25, 2013  
Page 1 of 38  
1234567...38

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