DATASHEET
ISLA222S
FN8302
Rev 1.00
July 6, 2015
Dual 12-bit, 250/200/125 MSPS JESD204B High Speed Serial Output ADC
The ISLA222S is a series of low-power, high-performance,
Features
dual-channel 12-bit, analog-to-digital converters. Designed
• JESD204A/B high-speed data interface
with FemtoCharge™ technology on a standard CMOS process,
the series supports sampling rates of up to 250MSPS. The
ISLA222S is part of a pin-compatible family of 12- and 14-bit
dual-channel A/Ds with maximum sample rates ranging from
125MSPS to 250MSPS and shares the same analog core as
Intersil's proven ISLA222P series of ADCs. The family
minimizes power consumption while providing state of the art
dynamic performance, offering an optimal performance vs
power trade-off.
- JESD204A compliant
- JESD204B device subclass 0 compliant
- JESD204B device subclass 2 compatible
- Up to 3 JESD204 output lanes running up to 4.375Gbps
- Highly configurable JESD204 transmitter
• Multiple chip time alignment and deterministic latency
support (JESD204B device subclass 2)
• SPI programmable debugging features and test patterns
• 48-pin QFN 7mmx7mm package
Differentiating the ISLA222S from the ISLA222P is its highly
configurable, JESD204B-compliant, high-speed serial output
link. The link offers data rates up to 4.375Gbps per lane and
multiple packing modes. It can be configured to use one, two,
or three lanes to transmit the conversion data, allowing for
flexibility in the receiver design. The SERDES transmitter also
provides deterministic latency and multi-chip time alignment
support to satisfy an application's complex synchronization
requirements.
Key Specifications
• SNR at 250/200/125MSPS
70.6/71.2/71.7 dBFS f = 30MHz
IN
70.3/70.7/70.9 dBFS f = 190MHz
IN
• SFDR at 250/200/125MSPS
A Serial Peripheral Interface (SPI) port allows for extensive
configurability of the JESD204B transmitter including access
to its built-in link and transport layer test patterns. The SPI port
also provides control for numerous additional features
including the fine gain and offset adjustments of the two ADC
cores as well as the programmable clock divider, enabling 2x
and 4x harmonic clocking.
87/93/95 dBc f = 30MHz
IN
84/93/86 dBc f = 190MHz
IN
• Total Power Consumption: 989mW at 250MSPS
Applications
• Radar and satellite antenna array processing
• Broadband communications and microwave receivers
• High-performance data acquisition
• Communications test equipment
• High-speed medical imaging
The ISLA222S is available in a space saving 7mmx7mm 48 Ld
QFN package. The package features a thermal pad for
improved thermal performance and is specified over the full
industrial temperature range (-40°C to +85°C).
Pin-compatible Family
SPEED
MODEL
ISLA224S25
RESOLUTION
(MSPS)
14
14
14
12
12
12
250
ISLA224S20
ISLA224S12
ISLA222S25
ISLA222S20
ISLA222S12
200
125
250
200
125
FIGURE 1. SERDES DATA EYE AT 4.375Gbps
FN8302 Rev 1.00
July 6, 2015
Page 1 of 38
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