Datasheet > ISL73007SEH

ISL73007SEH

更新时间： 2024-11-19 14:58:15

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
34页	1125K
描述
Rad Hard Small Form Factor 3A Point of Load Regulator

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ISL73007SEH 数据手册

Datasheet

ISL73007SEH

Radiation Hardened 18V, 3A Point-of-Load Regulator

The ISL73007SEH is a radiation hardened

Features

Point-of-Load (POL) buck regulator that provides up

to 3A of output current capability with an input voltage

ranging from 3V to 18V. The device uses constant

frequency peak current mode control architecture for

fast loop transient response. The device uses internal

compensation suitable for the entire switching

frequency range or an external Type II compensation

to optimize performance and stabilize the loop. The

ISL73007SEH is specified over a switching frequency

of 300kHz to 1MHz using an external resistor.

▪

Input Bias Voltage

• 3V to 18V

• 3V to 16.5V (LET 86MeV.cm /mg)

▪ Internal or external loop compensation

▪ 1% reference voltage over-temperature and

radiation

▪ Switching Frequency Dependant Soft-start

▪ Positive and negative overcurrent,

over/undervoltage, and over-temperature

protections

The ISL73007SEH integrates high-side (P-channel)

and low-side (N-channel) power FETs. There are

options for external or internal compensation,

switching frequency, and slope control, that can be

implemented with a minimum of external components

reducing the BOM count and design complexity.

▪ High 500kHz efficiency ≥90% from 1A to 3A

▪ 300kHz to 1MHz adjustable switching frequency

▪ Adjustable slope compensation

▪ Qualified to Renesas Rad Hard QML-V Equivalent

Screening and QCI Flow (R34TB0001EU)

The ISL73007SEH includes a comprehensive suite of

operational features and protections, including preset

undervoltage, overvoltage, overcurrent protections,

power-good, soft-start, and over-temperature.

• All screening and QCI is in accordance with

MIL-PRF-38535 Class-V

▪ Radiation acceptance testing

The ISL73007SEH is designed to operate across the

temperature range of -55°C to +125°C and is

available in a 14-lead ceramic dual in-line flat

package (CDFP) and die form.

• LDR (0.01rad(Si)/s): 75krad(Si)

▪ SEE hardness (see SEE report for details)

• Single Event Burnout (SEB) to Linear Energy

Transfer (LET) of 86MeV.cm /mg

Applications

▪ Low Power Auxiliary Rails for FPGAs, DSPs,

CPUs, and ASICs

4.7µH

PGND

PVIN

44µF

10kΩ

100µF

SGND

COMP

3900pF

10kΩ

14kΩ

VCC

2.2µF

SLOPE

2.21kΩ

44.2kΩ

100kΩ

Figure 1. External Compensation Application Diagram for 12V to 3.3V, 500kHz

R34DS0024EU0104 Rev.1.04

Nov 2, 2023

Page 1

12 3 4 5 6 7...34

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