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ISL70003ASEHFE/PROTO PDF预览

ISL70003ASEHFE/PROTO

更新时间: 2024-02-26 12:05:23
品牌 Logo 应用领域
瑞萨 - RENESAS 信息通信管理开关输出元件
页数 文件大小 规格书
35页 2171K
描述
SWITCHING REGULATOR

ISL70003ASEHFE/PROTO 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:QFF,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.72其他特性:ADJ OUTPUT FROM 0.9V TO 11.88V
模拟集成电路 - 其他类型:SWITCHING REGULATOR控制模式:VOLTAGE-MODE
控制技术:PULSE WIDTH MODULATION最大输入电压:13.2 V
最小输入电压:2.97 V标称输入电压:3 V
JESD-30 代码:S-CQFP-F64JESD-609代码:e4
长度:14.15 mm功能数量:1
端子数量:64最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:QFF封装形状:SQUARE
封装形式:FLATPACK峰值回流温度(摄氏度):NOT SPECIFIED
座面最大高度:2.67 mm表面贴装:YES
切换器配置:BUCK最大切换频率:575 kHz
技术:BICMOS温度等级:MILITARY
端子面层:Gold (Au)端子形式:FLAT
端子节距:0.635 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED总剂量:100k Rad(Si) V
宽度:14.15 mmBase Number Matches:1

ISL70003ASEHFE/PROTO 数据手册

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DATASHEET  
ISL70003ASEH  
Radiation and SEE Tolerant 3V to 13.2V, 9A Buck Regulator  
FN8746  
Rev 3.00  
Dec 21, 2017  
The ISL70003ASEH is an improved version of the  
Features  
ISL70003SEH regulator with both tighter load regulation  
(<0.3% typical) and a higher output current rating of 9A.  
Operating over an input voltage range of 3.0V to 13.2V with  
• Acceptance tested to 50krad(Si) (LDR) wafer-by-wafer  
• ±1% reference voltage over line, temperature, and radiation  
integrated low r  
MOSFETs makes this monolithic  
DS(ON)  
Integrated MOSFETs 31mΩPFET/21mΩ NFET  
solution highly efficient. Also, a tightly regulated output  
voltage is possible, which is externally adjustable from 0.6V to  
~90% of the input voltage. Continuous output load current  
- 95% peak efficiency  
• Externally adjustable loop compensation  
capability is 9A for T +125°C and 6A for T +150°C.  
J
J
• Supports DDR applications (V tracks V  
/2)  
voltage  
TT DDQ  
The ISL70003ASEH uses voltage mode control architecture  
with feed-forward and switches at a selectable frequency of  
500kHz or 300kHz. Loop compensation is externally  
adjustable to allow for an optimum balance between stability  
and output dynamic performance.  
- Buffer amplifier for generating V  
- 3A current sinking capability  
REF  
• Grounded lid eliminates charge build up  
• IMON pin for output current monitoring  
• Adjustable analog soft-start  
The device features two logic-level disable inputs that can be  
used to inhibit pulses on the phase (LXx) pins to maximize  
efficiency based on the load current. The ISL70003ASEH also  
supports DDR applications and contains a buffer amplifier for  
• Diode emulation for increased efficiency at light loads  
• 500kHz or 300kHz operating frequency  
• Monotonic start-up into prebiased load  
• Full military temperature range operation  
generating the V  
voltage.  
REF  
High integration, best in class radiation performance, and a  
feature-filled design make the ISL70003ASEH an ideal choice  
to power many of today’s small form-factor applications.  
- T = -55°C to +125°C  
A
- T = -55°C to +150°C  
J
Applications  
• FPGA, CPLD, DSP, CPU core, and I/O supply voltages  
• Radiation tolerance  
- High dose rate (50-300rad(Si)/s). . . . . . . . . . . 100krad(Si)  
- Low dose rate (0.01rad(Si)/s) . . . . . . . . . . . . 100krad(Si)*  
* Limit established by characterization.  
• DDR memory supply voltages  
• Low-voltage, high-density distributed power systems  
• SEE hardness  
2
Related Literature  
• For a full list of related documents, visit our website  
- ISL70003ASEH product page  
- SEB and SEL LET . . . . . . . . . . . . . . . . 86.4MeV•cm /mg  
TH  
- SET at LET 86.4MeV•cm /mg . . . . . . . . . . . .<±3% ΔV  
2
OUT  
2
- SEFI LET . . . . . . . . . . . . . . . . . . . . . . . . . 60MeV•cm /mg  
TH  
• Electrically screened to DLA SMD 5962-14203  
0.3  
0.2  
-55°C  
12V INTERMEDIATE BUS  
ISL70003ASEH  
1.5V CORE  
1.8V AUX  
3.3V I/O  
+125°C  
+25°C  
0.1  
0.0  
5V BUS  
ISL75051SEH  
ISL75051SEH  
ISL70003ASEH  
-0.1  
-0.2  
-0.3  
+85°C  
0
1
2
3
4
5
6
7
8
9
LOAD CURRENT (A)  
FIGURE 1. POWER DISTRIBUTION SOLUTION FOR RAD HARD LOW  
POWER FPGAs  
FIGURE 2. TYPICAL LOAD REGULATION, V = 12V, V = 3.3V,  
IN OUT  
f
= 500kHz  
SW  
FN8746 Rev 3.00  
Dec 21, 2017  
Page 1 of 35  
 

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