DATASHEET
ISL70003ASEH
Radiation and SEE Hardened 3V to 13.2V, 9A Buck Regulator
FN8746
Rev.4.01
Dec 12, 2019
The ISL70003ASEH is an improved version of the
Features
ISL70003SEH regulator with both tighter load regulation
(<0.3% typical) and a higher output current rating of 9A.
Operating over an input voltage range of 3.0V to 13.2V with
• Acceptance tested to 50krad(Si) (LDR) wafer-by-wafer
• ±1% reference voltage over line, temperature, and radiation
integrated low r
MOSFETs makes this monolithic
DS(ON)
• Integrated MOSFETs 31mΩPFET/21mΩ NFET
solution highly efficient. Also, a tightly regulated output
voltage is possible, which is externally adjustable from 0.6V to
~90% of the input voltage. Continuous output load current
- 95% peak efficiency
• Externally adjustable loop compensation
capability is 9A for T ≤+125°C and 6A for T ≤+150°C.
J
J
• Supports DDR applications (V tracks V
TT
- Buffer amplifier for generating V
- 3A current sinking capability
/2)
DDQ
voltage
The ISL70003ASEH uses voltage mode control architecture
with feed-forward and switches at a selectable frequency of
500kHz or 300kHz. Loop compensation is externally
adjustable to allow for an optimum balance between stability
and output dynamic performance.
REF
• Grounded lid eliminates charge build up
• IMON pin for output current monitoring
• Adjustable analog soft-start
The device features two logic-level disable inputs that can be
used to inhibit pulses on the phase (LXx) pins to maximize
efficiency based on the load current. The ISL70003ASEH also
supports DDR applications and contains a buffer amplifier for
• Diode emulation for increased efficiency at light loads
• 500kHz or 300kHz operating frequency
• Monotonic start-up into prebiased load
• Full military temperature range operation
generating the V
voltage.
REF
High integration, best-in-class radiation performance and a
feature-filled design make the ISL70003ASEH an ideal choice
to power many of today’s small form-factor applications.
- T = -55°C to +125°C
A
- T = -55°C to +150°C
J
Applications
• Radiation Acceptance (See TID Report)
- High dose rate (50-300rad(Si)/s). . . . . . . . . . . 100krad(Si)
- Low dose rate (0.01rad(Si)/s) . . . . . . . . . . . . . . 50krad(Si)
• FPGA, CPLD, DSP, CPU core, and I/O supply voltages
• DDR memory supply voltages
• SEE hardness (See SEE report)
2
• Low-voltage, high-density distributed power systems
- SEB and SEL LET . . . . . . . . . . . . . . . . 86.4MeV•cm /mg
TH
2
Related Literature
For a full list of related documents, visit our website:
- SET at LET 86.4MeV•cm /mg . . . . . . . . . . . .<±3% ΔV
OUT
2
- SEFI LET . . . . . . . . . . . . . . . . . . . . . . . . . 60MeV•cm /mg
TH
• Electrically screened to DLA SMD 5962-14203
• ISL70003ASEH device page
0.3
0.2
-55°C
+125°C
+25°C
0.1
0.0
12V INTERMEDIATE BUS
ISL70003ASEH
1.5V CORE
1.8V AUX
3.3V I/O
5V BUS
-0.1
-0.2
-0.3
ISL75051ASEH
ISL75051ASEH
ISL70003ASEH
+85°C
0
1
2
3
4
5
6
7
8
9
LOAD CURRENT (A)
FIGURE 1. POWER DISTRIBUTION SOLUTION FOR RAD HARD LOW
POWER FPGAs
FIGURE 2. TYPICAL LOAD REGULATION, V = 12V, V
IN
= 3.3V,
OUT
f
= 500kHz
SW
FN8746 Rev.4.01
Dec 12, 2019
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