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ISL70001SEH

更新时间: 2024-11-19 14:58:11
品牌 Logo 应用领域
瑞萨 - RENESAS /
页数 文件大小 规格书
24页 657K
描述
Radiation Hardened and SEE Hardened 6A Synchronous Buck Regulator

ISL70001SEH 数据手册

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DATASHEET  
ISL70001SEH, ISL70001SRH  
Radiation Hardened and SEE Hardened 6A Synchronous Buck Regulator  
FN7956  
Rev 3.02  
Sep 16, 2022  
The ISL70001SEH, ISL70001SRH are radiation hardened and  
Features  
SEE hardened high efficiency monolithic synchronous buck  
• ±1% reference voltage over line, load, temperature and  
radiation  
regulators with integrated MOSFETs. This single chip power  
solution operates over an input voltage range of 3V to 5.5V  
and provides a tightly regulated output voltage that is  
externally adjustable from 0.8V to ~85% of the input voltage.  
• Current mode control for excellent dynamic response  
• Full Mil-temp range operation (T = -55°C to +125°C)  
A
Output load current capacity is 6A for T < +145°C.  
J
• High efficiency >90%  
High integration and class leading radiation tolerance makes  
the ISL70001SEH, ISL70001SRH ideal choices to power  
many of today’s small form factor applications. Two devices  
can be synchronized to provide a complete power solution for  
large scale digital ICs, like field programmable gate arrays  
(FPGAs) that require separate core and I/O voltages.  
• Fixed 1MHz operating frequency  
• Available in a thermally enhanced heatsink package - R48.B  
• Operates from 3V to 5.5V supply  
• Adjustable output voltage  
- Two external resistors set V  
from 0.8V to ~85% of V  
IN  
OUT  
In applications where the ENABLE input is tied high to PVIN we  
recommend that the input voltage ramp rate be equal to or  
greater than 10V/ms. This is to prevent unwanted voltage from  
prematurely appearing on the output.  
• Bidirectional SYNC pin allows two devices to be  
synchronized 180° out-of-phase  
• Starts into prebiased load  
• Power-good output voltage monitor  
• Adjustable analog soft-start  
For a PVIN voltage that has a slower ramp rate or is stepped up  
we recommend use of the ISL70001ASEH. Ensuring that the  
ENABLE input is held low until the chosen VINPOR is satisfied  
will prevent this ‘false start’.  
• Input undervoltage, output undervoltage and output  
overcurrent protection  
• Electrically screened to DLA SMD 5962-09225  
• QML qualified per MIL-PRF-38535 requirements  
Applications  
• FPGA, CPLD, DSP, CPU core or I/O voltages  
• Radiation acceptance testing - ISL70001SEH  
- HDR (50-300rad(Si)/s): 100krad(Si) (min)  
- LDR (<10mrad(Si)/s): 50krad(Si) (min)  
• Radiation acceptance testing - ISL70001SRH  
- HDR (50-300rad(Si)/s): 100krad(Si) (min)  
• SEE hardness (see SEE report for details)  
• Low-voltage, high-density distributed power systems  
2
- SEL and SEB LET . . . . . . . . . . . 86.4MeV/mg/cm (min)  
eff  
2
-6  
- SEFI X-section (LET = 86.4MeV/mg/cm ) 1.4 x 10  
eff  
2
cm (max)  
2
- SET LET (<1 pulse perturbation) 86.4MeV/mg/cm  
eff  
(min)  
95  
90  
85  
80  
75  
70  
5V SUPPLY  
ISL70001SEH  
CORE  
AUX  
I/O  
SYNCH  
RAD TOLERANT  
FPGA  
ISL75051SEH  
ISL70001SEH  
SYNCH  
0
1
2
3
4
5
6
LOAD CURRENT (A)  
FIGURE 1. TYPICAL APPLICATION  
FIGURE 2. EFFICIENCY 5V INPUT TO 3.3V OUTPUT, T = +25°C  
A
FN7956 Rev 3.02  
Sep 16, 2022  
Page 1 of 23  
© 2011-2022 Renesas Electronics  

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