ISL6537A
®
Data Sheet
July 18, 2007
FN9143.5
ACPI Regulator/Controller for
Features
Dual Channel DDR Memory Systems
• Generates 5 Regulated Voltages
- Synchronous Buck PWM Controller for DDR V
The ISL6537A provides a complete ACPI compliant power
solution for up to 4 DIMM dual channel DDR/DDR2 Memory
systems. Included are both a synchronous buck controller to
DDQ
- 3A Integrated Sink/Source Linear Regulator with
Accurate VDDQ/2 Divider Reference for DDR V
TT
supply V
during S0/S1 and S3 states. During S0/S1 state,
DDQ
- PWM Regulator for GMCH Core
a fully integrated sink-source regulator generates an accurate
(V /2) high current V voltage without the need for a
- LDO Regulator for CPU/GMCH V Termination
TT
DDQ
TT
- LDO Regulator for DAC
negative supply. A buffered version of the V
/2 reference is
DDQ
provided as V
. A second PWM controller, which requires
REF
• ACPI Compliant Sleep State Control
• Glitch-Free Transitions During State Changes
external MOSFET drivers, is available for regulation of the
GMCH Core voltage. An LDO controller is also integrated for
the CPU V termination voltage regulation and the DAC.
TT
• Integrated V
Buffer
REF
The switching PWM controller drives two N-Channel
MOSFETs in a synchronous-rectified buck converter
topology. The synchronous buck converter uses voltage-
mode control with fast transient response. The switching
regulator provides a maximum static regulation tolerance of
±2% over line, load, and temperature ranges. The output is
user-adjustable by means of external resistors down to 0.8V.
• V
DDQ
MOSFETs
PWM Controller Drives Low Cost N-Channel
• 250kHz Constant Frequency Operation
- Both PWM Controllers are Phase Shifted 180°
• Tight Output Voltage Regulation
- All Outputs: ±2% Over Temperature
An integrated soft-start feature brings all outputs into
regulation in a controlled manner when returning to S0/S1
state from any sleep state. During S0 the VIDPGD signal
• Fully-Adjustable Outputs with Wide Voltage Range: Down
to 0.8V Supports DDR and DDR2 Specifications
• Simple Single-Loop Voltage-Mode PWM Control Design
• Fast PWM Converter Transient Response
• Under and Overvoltage Monitoring
indicates that the GMCH and CPU V termination voltage
TT
is within spec and operational.
All outputs, except VDAC, have undervoltage protection.
The switching regulator also has overvoltage and
overcurrent protection. Thermal shutdown is integrated.
• OCP on the V
DDQ
Switching Regulator
• Integrated Thermal Shutdown Protection
Pinout
ISL6537A (6X6 QFN)
• Pb-Free Plus Anneal Available (RoHS Compliant)
TOP VIEW
Applications
•
Single and Dual Channel DDR Memory Power Systems in
ACPI Compliant PCs
28 27 26 25 24 23 22
1
2
3
4
5
6
7
21
20
19
5VSBY
S3#
DRIVE3
FB3
•
Graphics Cards - GPU and Memory Supplies
• ASIC Power Supplies
P12V
PWM4
• Embedded Processor and I/O Supplies
• DSP Supplies
GND
29
GND
18 FB4
17
DDR_VTT
DDR_VTT
VDDQ
COMP4
16 COMP
15 FB
8
9
10 11 12 13 14
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1
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