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ISL26104 PDF预览

ISL26104

更新时间: 2024-11-22 02:57:35
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瑞萨 - RENESAS /
页数 文件大小 规格书
21页 1221K
描述
Low-Noise 24-bit Delta Sigma ADC

ISL26104 数据手册

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DATASHEET  
ISL26102, ISL26104  
Low-Noise 24-bit Delta Sigma ADC  
FN7608  
Rev 0.00  
October 12, 2012  
The ISL26102 and ISL26104 provide a low-noise  
Features  
• Programmable gain amplifier with gains of 1 to 128  
• Low noise: 7nV/Hz @ PGA = 128  
• Linearity error: 0.0002% FS  
programmable gain amplifier along with a 24-bit Delta-Sigma  
Analog-to-Digital Converter with two channel (ISL26102) or  
four channel (ISL26104) differential, multiplexed inputs. The  
devices feature exceptional noise performance for conversion  
rates ranging from 2.5Sps to 4kSps.  
• Output word rates up to 4kSps  
The on-chip low-noise programmable-gain amplifier provides  
gains ranging from 1 to 128, which supports ±19.5mVFS from  
a 5V reference. The high input impedance allows direct  
connection of sensors such as load cell bridges to ensure the  
specified measurement accuracy without additional circuitry.  
• Low-side switch for load cell power management  
• +5V analog and +2.7V to +5V digital supplies  
• ISL26102 in 24 Ld TSSOP  
• ISL26104 in 28 Ld TSSOP  
The Delta-Sigma ADC features a 3rd-order modulator providing  
up to 21.5 bit noise-free performance (10Sps), with  
user-selectable word rates. The converter can be operated  
from an external clock source, an external crystal (typically  
4.9152MHz), or the on-chip oscillator.  
• ESD 7.5kV - HBM  
Applications  
• Weigh scales  
The ISL26102 and ISL26104 offer a simple-to-use serial  
interface.  
• Temperature monitors and controls  
• Load safety systems  
• Industrial process control  
• Pressure sensors  
The ISL26102 and ISL26104 are available in a Thin Shrink  
Small Outline Package (TSSOP). The devices are specified for  
operation over the automotive temperature range (-40°C to  
+105°C).  
Related Literature  
AN1704, “Precision Signal Path Data Acquisition System”  
CAP  
AVDD  
DVDD  
DVDD  
ON-CHIP  
TEMP  
SENSOR  
XTALIN/  
CLOCK  
XTALOUT  
INTERNAL  
CLOCK  
EXTERNAL  
OSCILLATOR  
AIN1+  
AIN1-  
CS  
AIN2+  
SDO/RDY  
PGA  
1, 2, 4, 8,16,  
32, 64, 128  
AIN2-  
  
ADC  
INPUT  
MULTIPLEXER  
AIN3+  
AIN3-  
SDI  
ISL26104  
ONLY  
AIN4+  
AIN4-  
SCLK  
PWDN  
LSPS  
DGND DGND  
AGND  
CAP DGND DGND VREF+ VREF-  
FIGURE 1. BLOCK DIAGRAM  
FN7608 Rev 0.00  
October 12, 2012  
Page 1 of 21  

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