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IS93C46A

更新时间： 2024-01-18 15:11:37
品牌 Logo 应用领域
美国芯成 - ISSI 可编程只读存储器
页数 文件大小 规格书
13页 74K
描述
1,024-BIT SERIAL ELECTRICALLY ERASABLE PROM

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中文翻译

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IS93C46A 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
Reach Compliance Code：unknown风险等级：5.92
数据保留时间-最小值：10耐久性：100000 Write/Erase Cycles
JESD-30 代码：R-PDIP-T8JESD-609代码：e0
内存密度：1024 bit内存集成电路类型：EEPROM
内存宽度：16端子数量：8
字数：64 words字数代码：64
最高工作温度：85 °C最低工作温度：-40 °C
组织：64X16封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装等效代码：DIP8,.3
封装形状：RECTANGULAR封装形式：IN-LINE
并行/串行：SERIAL电源：5 V
认证状态：Not Qualified串行总线类型：MICROWIRE
最大待机电流：0.000002 A子类别：EEPROMs
最大压摆率：0.005 mA标称供电电压 (Vsup)：5 V
表面贴装：NO技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL写保护：SOFTWARE

IS93C46A 数据手册

 浏览型号IS93C46A的Datasheet PDF文件第2页浏览型号IS93C46A的Datasheet PDF文件第3页浏览型号IS93C46A的Datasheet PDF文件第4页浏览型号IS93C46A的Datasheet PDF文件第5页浏览型号IS93C46A的Datasheet PDF文件第6页浏览型号IS93C46A的Datasheet PDF文件第7页 
®
IS93C46A  
ISSI  
1,024-BIT SERIAL ELECTRICALLY  
ERASABLE PROM  
JUNE 2004  
FEATURES  
DESCRIPTION  
• Industry-standard Microwire Interface  
— Non-volatile data storage  
The IS93C46A is a low-cost 1kb non-volatile,  
ISSI serial EEPROM. It is fabricated using an  
®
— Low voltage operation:  
enhanced CMOS design and process. The  
IS93C46A contains power-efficient read/write  
memory, and organization of 128 bytes of 8 bits  
or 64 words of 16 bits. When the ORG pin is  
connected to Vcc or left unconnected, x16 is  
selected; when it is connected to ground, x8 is  
selected. The IS93C46A is fully backward  
compatible with IS93C46.  
Vcc = 2.5V to 5.5V  
— Full TTL compatible inputs and outputs  
— Auto increment for efficient data dump  
• User Configured Memory Organization  
— By 16-bit or by 8-bit  
• Hardware and software write protection  
— Defaults to write-disabled state at power-up  
— Software instructions for write-enable/disable  
• Enhanced low voltage CMOS E2PROM  
technology  
• Versatile, easy-to-use Interface  
— Self-timed programming cycle  
— Automatic erase-before-write  
— Programming status indicator  
— Word and chip erasable  
An instruction set defines the operation of the  
devices, including read, write, and mode-enable  
functions. To protect against inadvertent data  
modification, all erase and write instructions are  
accepted only while the device is write-enabled. A  
selected x8 byte or x16 word can be modified with  
a single WRITE or ERASE instruction.  
Additionally, the two instructions WRITE ALL or  
ERASE ALL can program the entire array. Once  
a device begins its self-timed program procedure,  
the data out pin (Dout) can indicate the READY/  
BUSY status by raising chip select (CS). The self-  
timed write cycle includes an automatic erase-  
before-write capability. The device can output any  
number of consecutive bytes/words using a single  
READ instruction.  
— Chip select enables power savings  
• Durable and reliable  
— 40-year data retention after 1M write cycles  
— 1 million write cycles  
— Unlimited read cycles  
— Schmitt-trigger inputs  
FUNCTIONAL BLOCK DIAGRAM  
DUMMY  
BIT  
DOUT  
DATA  
REGISTER  
INSTRUCTION  
REGISTER  
R/W  
AMPS  
DIN  
EEPROM  
ARRAY  
ADDRESS  
REGISTER  
INSTRUCTION  
DECODE,  
CONTROL,  
AND  
ADDRESS  
DECODER  
CS  
128x8  
64x16  
CLOCK  
SK  
GENERATION  
HIGH VOLTAGE  
GENERATOR  
WRITE  
ENABLE  
Copyright © 2004 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time  
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to  
obtain the latest version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. E  
1
06/07/04  
1234567...13

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