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IS9-1715ARH-T

更新时间： 2024-11-21 20:10:31
品牌 Logo 应用领域
瑞萨 - RENESAS 驱动接口集成电路驱动器
页数 文件大小 规格书
12页 303K
描述
BUF OR INV BASED MOSFET DRIVER, CDFP16, CERAMIC, DFP-16

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IS9-1715ARH-T 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：DFP包装说明：DFP,
针数：16Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.19高边驱动器：YES
接口集成电路类型：BUFFER OR INVERTER BASED MOSFET DRIVERJESD-30 代码：R-CDFP-F16
JESD-609代码：e0功能数量：1
端子数量：16最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：DFP封装形状：RECTANGULAR
封装形式：FLATPACK峰值回流温度（摄氏度）：NOT SPECIFIED
认证状态：Not Qualified筛选级别：MIL-PRF-38535 Class T
座面最大高度：2.92 mm最大供电电压：18 V
最小供电电压：10 V表面贴装：YES
温度等级：MILITARY端子面层：TIN LEAD
端子形式：FLAT端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
总剂量：100k Rad(Si) V宽度：6.73 mm
Base Number Matches：1

IS9-1715ARH-T 数据手册

 浏览型号IS9-1715ARH-T的Datasheet PDF文件第2页浏览型号IS9-1715ARH-T的Datasheet PDF文件第3页浏览型号IS9-1715ARH-T的Datasheet PDF文件第4页浏览型号IS9-1715ARH-T的Datasheet PDF文件第5页浏览型号IS9-1715ARH-T的Datasheet PDF文件第6页浏览型号IS9-1715ARH-T的Datasheet PDF文件第7页 
Datasheet  
IS-1715ARH, IS-1715AEH  
Radiation Hardened Complementary Switch FET Drivers  
The radiation hardened IS-1715ARH and  
Features  
IS-1715AEH are high speed, high current,  
complementary power FET drivers designed for use  
in synchronous rectification circuits. Soft switching  
transitions for the two output waveforms can be  
managed by setting the independently programmable  
delays. Alternatively, the delay pins can be configured  
for zero-voltage sensing to allow for precise switching  
control.  
• Electrically screened to SMD #5962-00521  
• QML qualified per MIL-PRF-38535 requirements  
• Radiation environment  
5
○ Gamma dose 3x10 rad(Si)  
○ Latch-up immune  
• PWR output current (source and sink): 3A (peak)  
• AUX output current (source and sink): 3A (peak)  
• Low operating supply current: 6mA (max)  
• Wide programmable delay range: 100ns to 600ns  
• Configurable for zero-voltage switching  
• Switching frequency to 1MHz  
The IS-1715ARH and IS-1715AEH have a single  
input, which is PWM and TTL compatible, and can run  
at frequencies up to 1MHz. The AUX output switches  
immediately at the rising edge of the INPUT, but waits  
for the T2 delay before responding to the falling edge.  
A logic low on the enable pin (ENBL) places both  
outputs into an active-low mode, and an Undervoltage  
Lockout (UVLO) function is set at 9V (maximum).  
• Both outputs active-low in Sleep mode  
• 9V (maximum) UVLO  
These devices are constructed with the dielectrically  
isolated Rad Hard Silicon Gate (RSG) process and  
are immune to Single Event Latch-Up (SEL). They  
have been specifically designed to provide highly  
reliable performance in harsh radiation environments.  
Related Literature  
For a full list of related documents, visit our website:  
• IS-1715ARH, IS-1715AEH device pages  
Applications  
• Synchronous rectification in power supplies  
VCC  
600  
T1  
T1  
T1  
-55 °C  
VCC = 10V  
125 °C 25 °C  
500  
400  
IS-1715  
INPUT  
VCC  
VCC  
PWM  
PWM  
Controller  
T1  
PWR  
300  
200  
100  
0
T2  
AUX  
GND  
GND  
ENBL  
-55 °C  
T2  
25 °C  
T2  
125 °C  
T2  
R 1  
R 2  
T
T
0
10  
20  
30  
40  
50  
60  
70  
80  
90 100  
GND  
R
(kΩ)  
T
Figure 2. T1 Delay, T2 Delay vs RT vs Temperature  
Figure 1. IS-1715 Typical Application Diagram  
FN4875 Rev.3.00  
Aug.16.19  
Page 1 of 12  
1234567...12

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