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IS75V16F64GS32-7070DI PDF预览

IS75V16F64GS32-7070DI

更新时间： 2024-11-21 20:10:47
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器内存集成电路
页数 文件大小 规格书
52页 238K
描述
Memory Circuit, Flash+SRAM, 4MX16, CMOS, PBGA65, 9 X 9 MM, 0.80 MM PITCH, FBGA-65

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IS75V16F64GS32-7070DI 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：BGA
包装说明：9 X 9 MM, 0.80 MM PITCH, FBGA-65针数：65
Reach Compliance Code：compliantHTS代码：8542.32.00.71
风险等级：5.92最长访问时间：70 ns
其他特性：ALSO CONTAINS 32MBIT PSEUDO SRAMJESD-30 代码：S-PBGA-B65
JESD-609代码：e0长度：9 mm
内存密度：67108864 bit内存集成电路类型：MEMORY CIRCUIT
内存宽度：16混合内存类型：FLASH+SRAM
功能数量：1端子数量：65
字数：4194304 words字数代码：4000000
工作模式：ASYNCHRONOUS最高工作温度：85 °C
最低工作温度：-30 °C组织：4MX16
封装主体材料：PLASTIC/EPOXY封装代码：LFBGA
封装等效代码：BGA65,10X10,32封装形状：SQUARE
封装形式：GRID ARRAY, LOW PROFILE, FINE PITCH峰值回流温度（摄氏度）：NOT SPECIFIED
电源：3 V认证状态：Not Qualified
座面最大高度：1.34 mm最大待机电流：0.005 A
子类别：Other Memory ICs最大压摆率：0.053 mA
最大供电电压 (Vsup)：3.1 V最小供电电压 (Vsup)：2.7 V
标称供电电压 (Vsup)：2.9 V表面贴装：YES
技术：CMOS温度等级：OTHER
端子面层：Tin/Lead (Sn/Pb)端子形式：BALL
端子节距：0.8 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：9 mm
Base Number Matches：1

IS75V16F64GS32-7070DI 数据手册

 浏览型号IS75V16F64GS32-7070DI的Datasheet PDF文件第2页浏览型号IS75V16F64GS32-7070DI的Datasheet PDF文件第3页浏览型号IS75V16F64GS32-7070DI的Datasheet PDF文件第4页浏览型号IS75V16F64GS32-7070DI的Datasheet PDF文件第5页浏览型号IS75V16F64GS32-7070DI的Datasheet PDF文件第6页浏览型号IS75V16F64GS32-7070DI的Datasheet PDF文件第7页 
®
75V16F64GS32  
ISSI  
64 Mbit FLASH MEMORY AND 32 Mbit PSEUDO SRAM  
STACKED MULTI-CHIP PACKAGE (MCP)  
PRELIMINARY INFORMATION  
AUGUST 2002  
MCP FEATURES  
• Power supply voltage of 2.7 to 3.1 volt  
• High performance:  
- Flash access time as fast as 70 ns  
- PSRAM access time as fast as 70 ns  
• Package: 65-Ball FBGA  
• WP/ACC Input Pin  
- At VIL, allows protection of “outermost” 2 × 8 Kbytes  
on both ends of boot sectors, regardless of sector  
protection/unprotection status  
- At VIH, allows removal of boot sector protection  
- At VACC, program time will be reduced by 40 %  
• Operating Temperature: –30°C to +85°C  
• Embedded EraseTM Algorithms  
- Automatically preprograms and erases the chip  
or any sector  
• Embedded ProgramTM Algorithms  
- Automatically writes and verifies data at specified  
address  
• Data Polling and Toggle Bit Feature for Detection of  
Program or Erase Cycle Completion  
• Ready/Busy Output (RY/BY)  
- Hardware method for detection of program or  
erase cycle completion  
FLASH MEMORY FEATURES  
• 0.17 µm Process Technology  
• Simultaneous Read/Write Operations (Dual Bank)  
• FlexBankTM architecture  
- Bank A : 8 Mbit (8KB x 8 and 64KB x 15)  
- Bank B : 24 Mbit (64KB x 48)  
- Bank C : 24 Mbit (64KB x 48)  
- Bank D : 8 Mbit (8KB x 8 and 64KB x 15)  
- Two virtual Banks are chosen from the combination  
of four physical banks (Refer to "Example of Virtual  
Banks Combination Table" and Simultaneous  
Operation Table" in FLEXIBLE SECTOR-ERASE  
ARCHITECTURE on FLASH MEMORY)  
- Host system can program or erase in one bank, and  
then read immediately and simultaneously from the  
other bank with zero latency between read and write  
operations.  
• Automatic Sleep Mode  
- When addresses remain stable, the device  
automatically switches itself to low power mode.  
• Low VCCf Write Inhibit ≤ 2.5 V  
• Program Suspend/Resume  
- Suspends the program operation to allow a read  
in another byte  
- Read-while-erase  
- Read-while-program  
• Erase Suspend/Resume  
- Suspends the erase operation to allow a read  
data and/or program in another sector within the  
same device  
• Single 3.0 V Read, Program, and Erase  
- Minimized system level power requirements  
• Minimum 100,000 Program/Erase Cycles  
• Sector Erase Architecture  
- Sixteen 4 Kword and one hundred twenty-six 32  
Kword sectors in word  
PSRAM FEATURES  
• Power Dissipation:  
- Operating  
- Standby  
: 25mA Max  
:100 µA Max  
- Any combination of sectors can be concurrently  
erased  
- Power Down : Sleep  
- NAP  
- 8M Partial : 70 µA Max  
• Power down Control by CE2r  
: 10 µA Max  
: 60 µA Max  
- Supports full chip erase  
• Hidden ROM (Hi-ROM) Region  
- 256 byte of Hi-ROM, accessible through a new "HI-  
ROM Enable" command sequence  
- Factory serialized and protected to provide a secure  
electronic serial number (ESN)  
• Byte Write Control : LB (DQ7-DQ0), UB (DQ15-DQ8)  
• 8 words Address Access Capability  
Copyright © 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time  
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to  
obtain the latest version of this device specification before relying on any published information and before placing orders for products. FlexBankTM is a trademark  
of Fujitsu Limited, Japan. Embedded EraseTM and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
PRELIMINARY INFORMATION Rev. 00A  
1
08/01/02  
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