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IS64WV12816DBLL-12BLA3-TR PDF预览

IS64WV12816DBLL-12BLA3-TR

更新时间: 2024-11-24 13:08:55
品牌 Logo 应用领域
美国芯成 - ISSI 存储内存集成电路静态存储器
页数 文件大小 规格书
21页 238K
描述
Application Specific SRAM, 128KX16, 12ns, CMOS, PBGA48, 6 X 8 MM, LEAD FREE, MINI, BGA-48

IS64WV12816DBLL-12BLA3-TR 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active包装说明:TFBGA, BGA48,6X8,30
Reach Compliance Code:compliantFactory Lead Time:12 weeks
风险等级:5.41Is Samacsys:N
最长访问时间:12 nsI/O 类型:COMMON
JESD-30 代码:R-PBGA-B48JESD-609代码:e3
长度:8 mm内存密度:2097152 bit
内存集成电路类型:APPLICATION SPECIFIC SRAM内存宽度:16
湿度敏感等级:1功能数量:1
端子数量:48字数:131072 words
字数代码:128000工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:-40 °C
组织:128KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA48,6X8,30封装形状:RECTANGULAR
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):225电源:2.5/3.3 V
认证状态:Not Qualified筛选级别:AEC-Q100
座面最大高度:1.2 mm最大待机电流:0.0001 A
最小待机电流:2 V子类别:SRAMs
最大压摆率:0.075 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.4 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:MATTE TIN
端子形式:BALL端子节距:0.75 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6 mmBase Number Matches:1

IS64WV12816DBLL-12BLA3-TR 数据手册

 浏览型号IS64WV12816DBLL-12BLA3-TR的Datasheet PDF文件第2页浏览型号IS64WV12816DBLL-12BLA3-TR的Datasheet PDF文件第3页浏览型号IS64WV12816DBLL-12BLA3-TR的Datasheet PDF文件第4页浏览型号IS64WV12816DBLL-12BLA3-TR的Datasheet PDF文件第5页浏览型号IS64WV12816DBLL-12BLA3-TR的Datasheet PDF文件第6页浏览型号IS64WV12816DBLL-12BLA3-TR的Datasheet PDF文件第7页 
IS61WV12816DALL/DALS  
IS61WV12816DBLL/DBLS  
IS64WV12816DBLL/DBLS  
128K x 16 HIGH SPEED ASYNCHRONOUS  
CMOS STATIC RAM  
MAY2008  
DESCRIPTION  
FEATURES  
TheISSIIS61WV12816DAxx/DBxxandIS64WV12816DBxx  
are high-speed, 2,097,152-bit static RAMs organized as  
131,072 words by 16 bits. It is fabricated usingISSI's high-  
performance CMOS technology. This highly reliable pro-  
cess coupled with innovative circuit design techniques,  
yields high-performance and low power consumption de-  
vices.  
HIGH SPEED: (IS61/64WV12816DALL/DBLL)  
• High-speed access time: 8, 10, 12, 20 ns  
• Low Active Power: 135 mW (typical)  
• Low Standby Power: 12 μW (typical)  
CMOS standby  
LOW POWER: (IS61/64WV12816DALS/DBLS)  
• High-speed access time: 25, 35 ns  
• Low Active Power: 55 mW (typical)  
When CE is HIGH (deselected), the device assumes a  
standby mode at which the power dissipation can be  
reduced down with CMOS input levels.  
• Low Standby Power: 12 μW (typical)  
CMOS standby  
Easy memory expansion is provided by using Chip Enable  
and Output Enable inputs, CE and OE. The active LOW  
Write Enable (WE) controls both writing and reading of the  
memory. A data byte allows Upper Byte (UB) and Lower  
Byte (LB) access.  
• Single power supply  
— VDD 1.65V to 2.2V (IS61WV12816DAxx)  
— VDD 2.4V to 3.6V (IS61/64WV12816DBxx)  
• Fully static operation: no clock or refresh  
required  
TheIS61WV12816DAxx/DBxxandIS64WV12816DBxxare  
packagedintheJEDECstandard44-pinTSOPTypeII and  
48-pin Mini BGA (6mm x 8mm).  
• Three state outputs  
• Data control for upper and lower bytes  
• Industrial and Automotive temperature support  
• Lead-free available  
FUNCTIONAL BLOCK DIAGRAM  
128K x 16  
MEMORY ARRAY  
A0-A16  
DECODER  
VDD  
GND  
I/O0-I/O7  
Lower Byte  
I/O  
DATA  
COLUMN I/O  
CIRCUIT  
I/O8-I/O15  
Upper Byte  
CE  
OE  
WE  
CONTROL  
CIRCUIT  
UB  
LB  
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time  
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to  
obtain the latest version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. — www.issi.com  
1
Rev. C  
05/01/08  

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