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IS62WV6416BLL-55TLI PDF预览

IS62WV6416BLL-55TLI

更新时间: 2024-01-09 20:38:24
品牌 Logo 应用领域
美国芯成 - ISSI 存储内存集成电路静态存储器光电二极管
页数 文件大小 规格书
17页 111K
描述
64K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM

IS62WV6416BLL-55TLI 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSOP2
包装说明:TSOP2, TSOP44,.46,32针数:44
Reach Compliance Code:compliantECCN代码:3A991
Factory Lead Time:8 weeks风险等级:2.07
Is Samacsys:N最长访问时间:55 ns
I/O 类型:COMMONJESD-30 代码:R-PDSO-G44
JESD-609代码:e3长度:18.415 mm
内存密度:1048576 bit内存集成电路类型:STANDARD SRAM
内存宽度:16湿度敏感等级:3
功能数量:1端子数量:44
字数:65536 words字数代码:64000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:64KX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装等效代码:TSOP44,.46,32
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):260
电源:3/3.3 V认证状态:Not Qualified
座面最大高度:1.2 mm最大待机电流:0.000005 A
最小待机电流:1.2 V子类别:SRAMs
最大压摆率:0.015 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.5 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.8 mm
端子位置:DUAL处于峰值回流温度下的最长时间:10
宽度:10.16 mmBase Number Matches:1

IS62WV6416BLL-55TLI 数据手册

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®
IS62WV6416ALL  
IS62WV6416BLL  
ISSI  
64K x 16 LOW VOLTAGE,  
ULTRA LOW POWER CMOS STATIC RAM  
JUNE2005  
FEATURES  
DESCRIPTION  
The ISSI IS62WV6416ALL/ IS62WV6416BLL are high-  
speed, 1M bit static RAMs organized as 64K words by 16  
bits. It is fabricated using ISSI's high-performance CMOS  
technology. This highly reliable process coupled with  
innovative circuit design techniques, yields high-  
performance and low power consumption devices.  
• High-speed access time: 45ns, 55ns  
• CMOS low power operation:  
30 mW (typical) operating  
15 µW (typical) CMOS standby  
• TTL compatible interface levels  
• Single power supply  
When CS1 is HIGH (deselected) or when CS2 is LOW  
(deselected) or when CS1 is LOW, CS2 is HIGH and both  
LBandUBareHIGH, thedeviceassumesastandbymode  
at which the power dissipation can be reduced down with  
CMOS input levels.  
1.7V--2.2V VDD (62WV6416ALL)  
2.5V--3.6V VDD (62WV6416BLL)  
Easy memory expansion is provided by using Chip Enable  
and Output Enable inputs. The active LOW Write Enable  
(WE) controls both writing and reading of the memory. A  
data byte allows Upper Byte (UB) and Lower Byte (LB)  
access.  
• Fully static operation: no clock or refresh  
required  
• Three state outputs  
• Data control for upper and lower bytes  
• Industrial temperature available  
• 2CS Option Available  
TheIS62WV6416ALLandIS62WV6416BLLarepackaged  
intheJEDECstandard48-pinminiBGA(6mmx8mm)and  
44-Pin TSOP (TYPE II).  
• Lead-free available  
FUNCTIONAL BLOCK DIAGRAM  
64K x 16  
MEMORY ARRAY  
A0-A15  
DECODER  
V
DD  
GND  
I/O0-I/O7  
Lower Byte  
I/O  
DATA  
CIRCUIT  
COLUMN I/O  
I/O8-I/O15  
Upper Byte  
CS2  
CS1  
OE  
WE  
UB  
CONTROL  
CIRCUIT  
LB  
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time  
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to  
obtain the latest version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. B  
1
06/03/05  

IS62WV6416BLL-55TLI 替代型号

型号 品牌 替代类型 描述 数据表
CY62126DV30LL-55ZIT CYPRESS

类似代替

Standard SRAM, 64KX16, 55ns, CMOS, PDSO44, TSOP2-44
CY62126EV30LL-45ZSXI CYPRESS

功能相似

1-Mbit (64K x 16) Static RAM

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