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IS62WV25616DALL-55TLI PDF预览

IS62WV25616DALL-55TLI

更新时间: 2024-11-27 12:08:39
品牌 Logo 应用领域
美国芯成 - ISSI 存储内存集成电路静态存储器光电二极管
页数 文件大小 规格书
17页 414K
描述
256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM

IS62WV25616DALL-55TLI 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:TSOP2
包装说明:TSOP2, TSOP44,.46,32针数:44
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.67
Is Samacsys:N最长访问时间:55 ns
I/O 类型:COMMONJESD-30 代码:R-PDSO-G44
JESD-609代码:e3长度:18.41 mm
内存密度:4194304 bit内存集成电路类型:STANDARD SRAM
内存宽度:16湿度敏感等级:3
功能数量:1端子数量:44
字数:262144 words字数代码:256000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:256KX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装等效代码:TSOP44,.46,32
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):260
电源:1.8/2 V认证状态:Not Qualified
座面最大高度:1.2 mm最大待机电流:0.000007 A
最小待机电流:1.2 V子类别:SRAMs
最大压摆率:0.015 mA最大供电电压 (Vsup):2.2 V
最小供电电压 (Vsup):1.65 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.8 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:10.16 mm
Base Number Matches:1

IS62WV25616DALL-55TLI 数据手册

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andOutputEnableinputs.  
                                                                       
TheactiveLOWWriteEnable(WE)  
                                                                                   
performanceCMOStechnology.Thishighlyreliableprocessꢀ  
                                                                            
IS62WV25616DALL/DBLL, IS65WV25616DBLL  
256K x 16 LOW VOLTAGE,  
ULTRA LOW POWER CMOS STATIC SRAM  
JUNE 2013  
FEATURES  
DESCRIPTION  
TheꢀISSIꢀIS62WV25616DALLꢀandꢀIS62/65WV25616DBLLꢀ  
areꢀꢀhigh-speed,ꢀlowꢀpower,ꢀ4MꢀbitꢀSRAMsꢀorganizedꢀasꢀ  
256K words by 16 bits. It is fabricated using ISSI's high-  
•ꢀ High-speed access time: 35, 45, 55 ns  
•ꢀ CMOSꢀlowꢀpowerꢀoperation  
30 mW (typical) operating  
coupled with innovative circuit design techniques, yields  
high-performance and low power consumption devices.  
ꢀ 6ꢀµWꢀ(typical)ꢀCMOSꢀstandby  
•ꢀ TTLꢀcompatibleꢀinterfaceꢀlevels  
•ꢀ Singleꢀpowerꢀsupplyꢀꢀ  
When CS1 is HIGH (deselected) or when CS2 is LOW  
(deselcted) or when CS1ꢀisꢀLOW,CS2ꢀisꢀHIGHꢀandꢀbothꢀ  
LB and UB are HIGH, the device assumes a standby mode  
at which the power dissipation can be reduced down with  
CMOSꢀinputꢀlevels.  
1.65V--2.2V Vdd (IS62WV25616DALL)  
2.5V--3.6V Vdd ꢀ(IS62/65WV25616DBLL)  
Easy memory expansion is provided by using Chip Enable  
•ꢀ Fullyꢀstaticꢀoperation:ꢀnoꢀclockꢀorꢀrefresh  
required  
controls both writing and reading of the memory.A data byte  
allows Upper Byte (UB)ꢀandꢀLowerꢀByteꢀ(LB) access.  
•ꢀ Threeꢀstateꢀoutputs  
•ꢀ Dataꢀcontrolꢀforꢀupperꢀandꢀlowerꢀbytes  
•ꢀ IndustrialꢀandꢀAutomotiveꢀtemperatureꢀsupport  
•ꢀ Lead-freeꢀavailable  
TheꢀIS62WV25616DALLꢀandꢀIS62/65WV25616DBLLꢀareꢀ  
packaged in the JEDEC standard 44-PinꢀTSOPꢀ(TYPEꢀII)  
and 48-pin mini BGA (6mmx8mm).  
•ꢀ 2ꢀCSꢀoptionꢀavailable  
FUNCTIONAL BLOCK DIAGRAM  
256K x 16  
MEMORY ARRAY  
A0-A17  
DECODER  
V
DD  
GND  
I/O0-I/O7  
Lower Byte  
I/O  
DATA  
COLUMN I/O  
CIRCUIT  
I/O8-I/O15  
Upper Byte  
CS2  
CS1  
OE  
CONTROL  
CIRCUIT  
WE  
UB  
LB  
Copyright © 2013 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without  
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-  
est version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be ex-  
pected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon  
Solution, Inc. receives written assurance to its satisfaction, that:  
a.) the risk of injury or damage has been minimized;  
b.) the user assume all such risks; and  
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances  
Integrated Silicon Solution, Inc. — www.issi.com  
1
Rev. D  
06/19/2013  

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