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IS62WV1288ALL-70B PDF预览

IS62WV1288ALL-70B

更新时间: 2024-11-24 12:59:19
品牌 Logo 应用领域
美国芯成 - ISSI /
页数 文件大小 规格书
15页 110K
描述
Standard SRAM, 128KX8, 70ns, CMOS, PBGA36, 6 X 8 MM, MINI, BGA-36

IS62WV1288ALL-70B 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:BGA
包装说明:6 X 8 MM, MINI, BGA-36针数:36
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.61
最长访问时间:70 nsI/O 类型:COMMON
JESD-30 代码:R-PBGA-B36JESD-609代码:e0
长度:8 mm内存密度:1048576 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
湿度敏感等级:3功能数量:1
端子数量:36字数:131072 words
字数代码:128000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:128KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA36,6X8,30封装形状:RECTANGULAR
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:1.8/2 V
认证状态:Not Qualified座面最大高度:1.2 mm
最大待机电流:0.000005 A最小待机电流:1.2 V
子类别:SRAMs最大压摆率:0.008 mA
最大供电电压 (Vsup):2.2 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:0.75 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6 mm
Base Number Matches:1

IS62WV1288ALL-70B 数据手册

 浏览型号IS62WV1288ALL-70B的Datasheet PDF文件第2页浏览型号IS62WV1288ALL-70B的Datasheet PDF文件第3页浏览型号IS62WV1288ALL-70B的Datasheet PDF文件第4页浏览型号IS62WV1288ALL-70B的Datasheet PDF文件第5页浏览型号IS62WV1288ALL-70B的Datasheet PDF文件第6页浏览型号IS62WV1288ALL-70B的Datasheet PDF文件第7页 
®
IS62WV1288ALL  
IS62WV1288BLL  
ISSI  
JUNE2005  
128K x 8 LOW VOLTAGE,  
ULTRA LOW POWER CMOS STATIC RAM  
FEATURES  
DESCRIPTION  
The ISSI IS62WV1288ALL / IS62WV1288BLL are high-  
speed, 1M bit static RAMs organized as 128K words by 8  
bits. It is fabricated using ISSI's high-performance CMOS  
technology. This highly reliable process coupled with  
innovative circuit design techniques, yields high-  
performance and low power consumption devices.  
• High-speed access time: 45ns, 55ns, 70ns  
• CMOS low power operation:  
30 mW (typical) operating  
15 µW (typical) CMOS standby  
• TTL compatible interface levels  
• Single power supply:  
When CS1 is HIGH (deselected) or when CS2 is LOW  
(deselected),thedeviceassumesastandbymodeatwhich  
the power dissipation can be reduced down with CMOS  
input levels.  
1.65V--2.2V VDD (62WV1288ALL)  
2.5V--3.6V VDD (62WV1288BLL)  
Easy memory expansion is provided by using Chip Enable  
and Output Enable inputs. The active LOW Write Enable  
(WE) controls both writing and reading of the memory.  
• Fully static operation: no clock or refresh  
required  
TheIS62WV1288ALLandIS62WV1288BLLarepackaged  
in the JEDEC standard 32-pin TSOP (TYPEI), sTSOP  
(TYPEI), SOP, and 36-pin mini BGA.  
• Three state outputs  
• Industrial temperature available  
• Lead-free available  
FUNCTIONAL BLOCK DIAGRAM  
128K x 8  
MEMORY ARRAY  
A0-A16  
DECODER  
VDD  
GND  
I/O  
DATA  
COLUMN I/O  
I/O0-I/O7  
CIRCUIT  
CS2  
CS1  
OE  
CONTROL  
CIRCUIT  
WE  
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time  
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to  
obtain the latest version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. C  
1
06/20/05  

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