®
IS62LV12816BL/LL
128K x 16 LOW VOLTAGE, ULTRA
LOW POWER CMOS STATIC RAM
ISSI
PRELIMINARY INFORMATION
FEBRUARY 2000
FEATURES
DESCRIPTION
The ISSI IS62LV12816BL and IS62LV12816BLL are
high-speed, 2,097,152-bit static RAMs organized as
131,072 words by 16 bits. They are fabricated using
ISSI's high-performance CMOS technology. This highly
reliable process coupled with innovative circuit design
techniques, yields high-performance and low power
consumption devices.
• High-speed access time: 55, 70, 100 ns
• CMOS low power operation
– 120 mW (typical) operating
– 6 µW (typical) CMOS standby
• TTL compatible interface levels
• Single 2.5V-3.0V VCC power supply
WhenCEisHIGH(deselected)orwhenCEislowandbothLBand
UBareHIGH,thedeviceassumesastandbymodeatwhichthe
powerdissipationcanbereduceddownwithCMOSinputlevels.
• Fully static operation: no clock or refresh
required
• Three state outputs
EasymemoryexpansionisprovidedbyusingChipEnableand
OutputEnableinputs,CEandOE.TheactiveLOWWriteEnable
(WE)controlsbothwritingandreadingofthememory.Adatabyte
allowsUpperByte(UB)andLowerByte(LB)access.
• Data control for upper and lower bytes
• Industrial temperature available
• Available in the 44-pin TSOP (Type II) and
48-pin mini BGA
TheIS62LV12816BLandIS62LV12816BLLarepackagedinthe
JEDECstandard44-pinTSOP(TypeII)and48-pinminiBGA.
FUNCTIONAL BLOCK DIAGRAM
128K x 16
MEMORY ARRAY
A0-A16
DECODER
VCC
GND
I/O0-I/O7
Lower Byte
I/O
DATA
COLUMN I/O
CIRCUIT
I/O8-I/O15
Upper Byte
CE
OE
WE
CONTROL
CIRCUIT
UB
LB
This document contains PRELIMINARY INFORMATION data. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best
possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
1
PRELIMINARY INFORMATION Rev. 00B
02/29/00