Datasheet > IS62C1024LL

IS62C1024LL

更新时间： 2024-09-19 04:44:47

品牌	Logo	应用领域
矽成 - ICSI		/
页数	文件大小	规格书
8页	123K
描述
128K x 8 LOW POWER CMOS STATIC RAM

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IS62C1024LL 数据手册

IS62C1024LL

128K x 8 LOW POWER CMOS STATIC RAM

ꢀEATURES

DESCRIPTION

The ICSI IS62C1024LL is a low power,131,072-word by 8-bit

CMOS static RAM. It is fabricated using ICSI's high-

performance CMOS technology. This highly reliable process

coupled with innovative circuit design techniques, yields higher

performance and low power consumption devices.

High-speed access time: 70 ns

Low active power: 350 mW (typical)

Low standby power: 125 µW (typical) CMOS

standby

Output Enable (OE) and two Chip Enable

(CE1 and CE2) inputs for ease in applications

When CE1 is HIGH or CE2 is LOW (deselected), the device

assumes a standby mode at which the power dissipation can

be reduced by using CMOS input levels.

+ully static operation: no clock or refresh

required

Easy memory expansion is provided by using two Chip Enable

inputs, CE1 and CE2. The active LOW Write Enable (WE)

controls both writing and reading of the memory.

TTL compatible inputs and outputs

Single 5V (±10%) power supply

Data retention voltage: 2V(min.)

The IS62C1024LL is available in 32-pin 600mil DIP, 450mil

SOP and 8*20mm TSOP-1 packages.

ꢀUNCTIONAL BLOCK DIAGRAM

512 x 2048

MEMORY ARRAY

A0-A16

DECODER

VCC

GND

I/O

DATA

COLUMN I/O

I/O0-I/O7

CIRCUIT

CE1

CE2

CONTROL

CIRCUIT

ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors

Integrated Circuit Solution Inc.

SR028-0C

12 3 4 5 6 7 8

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与IS62C1024LL相关器件

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