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IS61WV25616BLS-25TLI PDF预览

IS61WV25616BLS-25TLI

更新时间: 2024-11-12 12:08:39
品牌 Logo 应用领域
美国芯成 - ISSI 存储内存集成电路静态存储器光电二极管
页数 文件大小 规格书
21页 212K
描述
256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM

IS61WV25616BLS-25TLI 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSOP2
包装说明:TSOP2, TSOP44,.46,32针数:44
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41Factory Lead Time:8 weeks
风险等级:5.63Is Samacsys:N
最长访问时间:25 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-G44JESD-609代码:e3
长度:18.415 mm内存密度:4194304 bit
内存集成电路类型:STANDARD SRAM内存宽度:16
湿度敏感等级:3功能数量:1
端子数量:44字数:262144 words
字数代码:256000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:256KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSOP2
封装等效代码:TSOP44,.46,32封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
峰值回流温度(摄氏度):260电源:2.5/3.3 V
认证状态:Not Qualified座面最大高度:1.2 mm
最大待机电流:0.009 A最小待机电流:2 V
子类别:SRAMs最大压摆率:0.025 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.4 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.8 mm端子位置:DUAL
处于峰值回流温度下的最长时间:10宽度:10.16 mm
Base Number Matches:1

IS61WV25616BLS-25TLI 数据手册

 浏览型号IS61WV25616BLS-25TLI的Datasheet PDF文件第2页浏览型号IS61WV25616BLS-25TLI的Datasheet PDF文件第3页浏览型号IS61WV25616BLS-25TLI的Datasheet PDF文件第4页浏览型号IS61WV25616BLS-25TLI的Datasheet PDF文件第5页浏览型号IS61WV25616BLS-25TLI的Datasheet PDF文件第6页浏览型号IS61WV25616BLS-25TLI的Datasheet PDF文件第7页 
IS61WV25616ALL/ALS  
IS61WV25616BLL/BLS  
IS64WV25616BLL/BLS  
256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM  
JULY2010  
DESCRIPTION  
FEATURES  
The ISSI IS61WV25616Axx/Bxx and IS64WV25616Bxx  
are high-speed, 4,194,304-bit static RAMs organized as  
262,144 words by 16 bits. It is fabricated usingISSI's high-  
performance CMOS technology. This highly reliable pro-  
cess coupled with innovative circuit design techniques,  
yields high-performance and low power consumption de-  
vices.  
HIGHSPEED:(IS61/64WV25616ALL/BLL)  
• High-speed access time: 8, 10, 20 ns  
• Low Active Power: 85 mW (typical)  
• Low Standby Power: 7 mW (typical)  
CMOS standby  
LOWPOWER:(IS61/64WV25616ALS/BLS)  
• High-speed access time: 25, 35, 45 ns  
• Low Active Power: 35 mW (typical)  
When CE is HIGH (deselected), the device assumes a  
standby mode at which the power dissipation can be  
reduced down with CMOS input levels.  
• Low Standby Power: 0.6 mW (typical)  
CMOS standby  
Easy memory expansion is provided by using Chip Enable  
and Output Enable inputs, CE and OE. The active LOW  
Write Enable (WE) controls both writing and reading of the  
memory. A data byte allows Upper Byte (UB) and Lower  
Byte (LB) access.  
• Singlepowersupply  
— VDD 1.65V to 2.2V (IS61WV25616Axx)  
— VDD 2.4V to 3.6V (IS61/64WV25616Bxx)  
• Fully static operation: no clock or refresh required  
• Three state outputs  
The IS61WV25616Axx/Bxx and IS64WV25616Bxx are  
packagedintheJEDECstandard44-pinTSOPTypeII and  
48-pin Mini BGA (6mm x 8mm).  
• Data control for upper and lower bytes  
• IndustrialandAutomotivetemperaturesupport  
• Lead-freeavailable  
FUNCTIONAL BLOCK DIAGRAM  
256K x 16  
MEMORY ARRAY  
A0-A17  
DECODER  
VDD  
GND  
I/O0-I/O7  
Lower Byte  
I/O  
DATA  
COLUMN I/O  
CIRCUIT  
I/O8-I/O15  
Upper Byte  
CE  
OE  
WE  
CONTROL  
CIRCUIT  
UB  
LB  
Copyright © 2010 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time  
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to  
obtain the latest version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can  
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such  
applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:  
a.) the risk of injury or damage has been minimized;  
b.) the user assume all such risks; and  
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances  
Integrated Silicon Solution, Inc. — www.issi.com  
1
Rev. G  
07/15/2010  

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