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IS61WV20488BLL-10TI PDF预览

IS61WV20488BLL-10TI

更新时间: 2024-09-23 02:55:23
品牌 Logo 应用领域
美国芯成 - ISSI /
页数 文件大小 规格书
20页 118K
描述
2M x 8 HIGH-SPEED CMOS STATIC RAM

IS61WV20488BLL-10TI 数据手册

 浏览型号IS61WV20488BLL-10TI的Datasheet PDF文件第2页浏览型号IS61WV20488BLL-10TI的Datasheet PDF文件第3页浏览型号IS61WV20488BLL-10TI的Datasheet PDF文件第4页浏览型号IS61WV20488BLL-10TI的Datasheet PDF文件第5页浏览型号IS61WV20488BLL-10TI的Datasheet PDF文件第6页浏览型号IS61WV20488BLL-10TI的Datasheet PDF文件第7页 
IS61WV20488ALL  
IS61WV20488BLL  
IS64WV20488BLL  
®
ISSI  
PRELIMINARYINFORMATION  
JANUARY2006  
2M x 8 HIGH-SPEED CMOS STATIC RAM  
FEATURES  
DESCRIPTION  
• High-speed access times:  
8, 10, 20 ns  
• High-performance, low-power CMOS process  
• Multiple center power and ground pins for  
greater noise immunity  
• Easy memory expansion with CE and OE  
TheISSIIS61WV20488ALL/BLLandIS64WV20488BLL  
are very high-speed, low power, 2M-word by 8-bit CMOS  
static RAM. The IS61WV20488ALL/BLL and  
IS64WV20488BLLarefabricatedusingISSI'shigh-  
performance CMOS technology. This highly reliable  
process coupled with innovative circuit design tech-  
niques, yields higher performance and low power con-  
sumption devices.  
options  
CE power-down  
• Fully static operation: no clock or refresh  
required  
When CE is HIGH (deselected), the device assumes a  
standby mode at which the power dissipation can be  
reduced down with CMOS input levels.  
• TTL compatible inputs and outputs  
• Single power supply  
TheIS61WV20488ALL/BLLandIS64WV20488BLL  
operate from a single power supply and all inputs are  
TTL-compatible.  
– VDD 1.65V to 2.2V (IS61WV20488ALL)  
speed = 20ns for Vcc = 1.65V to 2.2V  
– VDD 2.4V to 3.6V (IS61/64WV20488BLL)  
speed = 10ns for Vcc = 2.4V to 3.6V  
speed = 8ns for Vcc = 3.3V + 5%  
• Packages available:  
TheIS61WV20488ALL/BLLandIS64WV20488BLLare  
available in 48 ball mini BGA and 44-pin TSOP (Type II)  
packages.  
48-ball miniBGA (9mm x 11mm)  
– 44-pin TSOP (Type II)  
• Industrial and Automotive Temperature Support  
• Lead-free available  
FUNCTIONAL BLOCK DIAGRAM  
2M X 8  
MEMORY ARRAY  
A0-A20  
DECODER  
VDD  
GND  
I/O  
DATA  
COLUMN I/O  
I/O0-I/O7  
CIRCUIT  
CE  
OE  
WE  
CONTROL  
CIRCUIT  
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time  
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to  
obtain the latest version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
1
Rev. 00C  
01/09/06  

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