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IS61LV12816-12K

更新时间： 2024-11-23 22:48:03

品牌	Logo	应用领域
矽成 - ICSI		/
页数	文件大小	规格书
11页	146K
描述
128K x 16 HIGH-SPEED CMOS STATIC RAM

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IS61LV12816-12K 数据手册

IS61LV12816

128K x 16 HIGH-SPEED CMOS STATIC RAM

WITH 3.3V SUPPLY

FEATURES

DESCRIPTION

The ICSI IS61LV12816 is a high-speed, 2,097,152-bit static

RAM organized as 131,072 words by 16 bits. It is fabricated

using ICSI's high-performance CMOS technology. This highly

reliable process coupled with innovative circuit design

techniques, yields access times as fast as 8 ns with low power

consumption.

High-speed access time: 8, 10, 12, and 15 ns

CMOS low power operation

TTL and CMOS compatible interface levels

Single 3.3V + 10%power supply

Fully static operation: no clock or refresh

required

When CE is HIGH (deselected), the device assumes a standby

mode at which the power dissipation can be reduced down with

CMOS input levels.

Three state outputs

Data control for upper and lower bytes

Industrial temperature available

Easy memory expansion is provided by using Chip Enable and

Output Enable inputs, CE and OE. The active LOW Write

Enable (WE) controls both writing and reading of the memory.

A data byte allows Upper Byte (UB) and Lower Byte (LB)

access.

The IS61LV12816 is packaged in the JEDEC standard 44-pin

400mil SOJ, 44-pin 400mil TSOP-2, and 48-pin 6*8mm TF-

BGA.

FUNCTIONAL BLOCK DIAGRAM

128K x 16

MEMORY ARRAY

A0-A16

DECODER

VCC

GND

I/O0-I/O7

Lower Byte

I/O

DATA

COLUMN I/O

CIRCUIT

I/O8-I/O15

Upper Byte

CONTROL

CIRCUIT

ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors

Integrated Circuit Solution, Inc.

SR023_0C

12 3 4 5 6 7...11

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