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IS61C1024-12T

更新时间: 2024-02-14 11:49:32
品牌 Logo 应用领域
美国芯成 - ISSI /
页数 文件大小 规格书
11页 83K
描述
128K x 8 HIGH-SPEED CMOS STATIC RAM

IS61C1024-12T 数据手册

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®
IS61C1024  
ISSI  
IS61C1024L  
128K x 8 HIGH-SPEED  
CMOS STATIC RAM  
MAY 1999  
DESCRIPTION  
FEATURES  
The ISSI IS61C1024 and IS61C1024L are very high-speed,  
low power, 131,072-word by 8-bit CMOS static RAMs. They  
are fabricated using ISSI's high-performance CMOS  
technology.Thishighlyreliableprocesscoupledwithinnovative  
circuit design techniques, yields higher performance and low  
power consumption devices.  
• High-speed access time: 12, 15, 20, 25 ns  
Low active power: 600 mW (typical)  
Low standby power: 500 µW (typical) CMOS  
standby  
• Output Enable (OE) and two Chip Enable  
(CE1 and CE2) inputs for ease in applications  
When CE1 is HIGH or CE2 is LOW (deselected), the device  
assumes a standby mode at which the power dissipation can  
be reduced by using CMOS input levels.  
• Fully static operation: no clock or refresh  
required  
EasymemoryexpansionisprovidedbyusingtwoChipEnable  
inputs, CE1 and CE2. The active LOW Write Enable (WE)  
controls both writing and reading of the memory.  
• TTL compatible inputs and outputs  
• Single 5V (±10%) power supply  
• Low power version available: IS61C1024L  
The IS61C1024 and IS61C1024L are available in 32-pin  
300-mil SOJ, and TSOP (Type I, 8x20), and sTSOP (Type I,  
8 x 13.4) packages.  
• Commercial and industrial temperature ranges  
available  
FUNCTIONAL BLOCK DIAGRAM  
512 x 2048  
MEMORY ARRAY  
A0-A16  
DECODER  
VCC  
GND  
I/O  
DATA  
COLUMN I/O  
I/O0-I/O7  
CIRCUIT  
CE1  
CE2  
CONTROL  
CIRCUIT  
OE  
WE  
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which  
may appear in this publication. © Copyright 1999, Integrated Silicon Solution, Inc.  
Integrated Silicon Solution, Inc. — 1-800-379-4774  
1
SR028-1K  
05/12/99  

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