Datasheet > IS46TR16640ED-125KBLA2

IS46TR16640ED-125KBLA2

更新时间： 2024-11-24 01:03:23

品牌	Logo	应用领域
美国芯成 - ISSI		动态存储器双倍数据速率
页数	文件大小	规格书
74页	3399K
描述
128MX8, 64MX16 1Gb DDR3 SDRAM WITH ECC

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IS43/46TR16640ED

IS43/46TR81280ED

128MX8, 64MX16 1Gb DDR3 SDRAM WITH ECC

Preliminary Information

AUGUST 2016

FEATURES



Standard Voltage: V_DDand V_DDQ= 1.5V ± 0.075V



Refresh Interval:

7.8 μs (8192 cycles/64 ms) Tc= -40°C to 85°C

3.9 μs (8192 cycles/32 ms) Tc= 85°C to 105°C

1.95 μs (8192 cycles/16ms)Tc=105°C to 125°C

High speed data transfer rates with system

frequency up to 800 MHz



8 internal banks for concurrent operation

8n-bit pre-fetch architecture



Partial Array Self Refresh

Asynchronous RESET pin

Programmable CAS Latency

TDQS (Termination Data Strobe) supported (x8

only)

Programmable Additive Latency: 0, CL-1,CL-2

Programmable CAS WRITE latency (CWL) based

on tCK



OCD (Off-Chip Driver Impedance Adjustment)

Dynamic ODT (On-Die Termination)

Driver strength : RZQ/7, RZQ/6 (RZQ = 240  )

Write Leveling



Programmable Burst Length: 4 and 8

Programmable Burst Sequence: Sequential or

Interleave



BL switch on the fly

Operating temperature:

Automotive, A1 (T_C= -40°C to +95°C)

Automotive, A2 (T_C= -40°C to +105°C)

Automotive, A3 (T_C= -40°C to +125°C)

Auto Self Refresh(ASR)

Self Refresh Temperature(SRT)

ECC



Single bit error correction (per 64-bits)

ADDRESS TABLE

Parameter

Restrictions on Burst Length and Data Mask

128Mx8

A0-A13

A0-A9

64Mx16

A0-A12

A0-A9

Row Addressing

Column Addressing

Bank Addressing

Page size

OPTIONS



Configuration:

BA0-2

128Mx8

64Mx16

1KB

2KB

Auto Precharge Addressing

BL switch on the fly

A10/AP

A12/BC#

A10/AP

A12/BC#



Package:

96-ball FBGA (9mm x 13mm) for x16

78-ball FBGA (8mm x 10.5mm) for x8

SPEED BIN

Speed Option

15H

125K

Units

JEDEC Speed Grade

DDR3-1333H

DDR3-1600K

CL-nRCD-nRP

tRCD,tRP(min)

9-9-9

13.5

11-11-11

13.75

tCK

Note: Faster speed options may be backward compatible to slower speed options. Refer to timing tables (8.3)

without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised

to obtain the latest version of this device specification before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product

can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use

in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:

a.) the risk of injury or damage has been minimized;

b.) the user assume all such risks; and

c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances

Integrated Silicon Solution, Inc. – www.issi.com –

Rev. 0B

08/08/2016

12 3 4 5 6 7...74

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与IS46TR16640ED-125KBLA2相关器件

型号	品牌	获取价格	描述	数据表
IS46TR16640ED-125KBLA3	ISSI	获取价格	DDR DRAM, 64MX16, CMOS, PBGA96, FBGA-96
IS46TR16640ED-15HBLA1	ISSI	获取价格	DDR DRAM, 64MX16, CMOS, PBGA96, FBGA-96
IS46TR16640ED-15HBLA2	ISSI	获取价格	DDR DRAM, 64MX16, CMOS, PBGA96, FBGA-96
IS46TR16640ED-15HBLA3	ISSI	获取价格	DDR DRAM, 64MX16, CMOS, PBGA96, FBGA-96
IS46TR81280A-125JBLA2	ISSI	获取价格	DDR DRAM, 128MX8, 12.5ns, CMOS, PBGA78, 8 X 10.50 MM, 0.80 MM PITCH, LEAD FREE, FBGA-78
IS46TR81280A-125KBLA1	ISSI	获取价格	DDR DRAM, 128MX8, 13.75ns, CMOS, PBGA78, 8 X 10.50 MM, 0.80 MM PITCH, LEAD FREE, FBGA-78
IS46TR81280A-125KBLA2	ISSI	获取价格	DDR DRAM, 128MX8, 13.75ns, CMOS, PBGA78, 8 X 10.50 MM, 0.80 MM PITCH, LEAD FREE, FBGA-78
IS46TR81280A-187FBLA1	ISSI	获取价格	DDR DRAM, 128MX8, 13.125ns, CMOS, PBGA78, 8 X 10.50 MM, 0.80 MM PITCH, LEAD FREE, FBGA-78
IS46TR81280B	ISSI	获取价格	Programmable CAS Latency
IS46TR81280BL	ISSI	获取价格	Programmable CAS Latency

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