Datasheet > IS43R83200F

IS43R83200F

更新时间： 2024-10-28 01:11:51

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美国芯成 - ISSI		/
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32页	1118K
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数据手册

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IS43R83200F 数据手册

IS43R83200F

IS43/46R16160F, IS43/46R32800F

PRELIMINARY INFORMATION

MARCH 2014

8Mx32, 16Mx16, 32Mx8

256Mb DDR SDRAM

FEATURES

DEVICE OVERVIEW

•ꢀ VDDꢀandꢀVDDQ:ꢀ2.5Vꢀ±ꢀ0.2Vꢀ

•ꢀ SSTL_2ꢀcompatibleꢀI/O

ISSI’sꢀ256-MbitꢀDDRꢀSDRAMꢀachievesꢀhighꢀspeedꢀdataꢀ

transfer using pipeline architecture and two data word

accessesꢀperꢀclockꢀcycle.ꢀTheꢀ268,435,456-bitꢀmemoryꢀ

arrayꢀisꢀinternallyꢀorganizedꢀasꢀfourꢀbanksꢀofꢀ64Mbꢀtoꢀ

allowꢀconcurrentꢀoperations.ꢀTheꢀpipelineꢀallowsꢀReadꢀ

and Write burst accesses to be virtually continuous, with

theꢀoptionꢀtoꢀconcatenateꢀorꢀtruncateꢀtheꢀbursts.ꢀTheꢀ

programmable features of burst length, burst sequence

andꢀCASꢀlatencyꢀenableꢀfurtherꢀadvantages.ꢀTheꢀdeviceꢀ

isꢀavailableꢀinꢀ8-bit,ꢀ16-bitꢀandꢀ32-bitꢀdataꢀwordꢀsizeꢀ

InputꢀdataꢀisꢀregisteredꢀonꢀtheꢀI/Oꢀpinsꢀonꢀbothꢀedgesꢀ

ofꢀDataꢀStrobeꢀsignal(s),ꢀwhileꢀoutputꢀdataꢀisꢀreferencedꢀ

toꢀbothꢀedgesꢀofꢀDataꢀStrobeꢀandꢀbothꢀedgesꢀofꢀCLK.ꢀ

CommandsꢀareꢀregisteredꢀonꢀtheꢀpositiveꢀedgesꢀofꢀCLK.ꢀ

•ꢀ Double-dataꢀrateꢀarchitecture;ꢀtwoꢀdataꢀtransfersꢀ

per clock cycle

•ꢀ Bidirectional,ꢀdataꢀstrobeꢀ(DQS)ꢀisꢀtransmitted/

received with data, to be used in capturing data

at the receiver

•ꢀ DQSꢀisꢀedge-alignedꢀwithꢀdataꢀforꢀREADsꢀandꢀ

centre-alignedꢀwithꢀdataꢀforꢀWRITEs

•ꢀ Differentialꢀclockꢀinputsꢀ(CKꢀandꢀCK)

•ꢀ DLLꢀalignsꢀDQꢀandꢀDQSꢀtransitionsꢀwithꢀCKꢀ

transitions

•ꢀ CommandsꢀenteredꢀonꢀeachꢀpositiveꢀCKꢀedge;ꢀdataꢀ

andꢀdataꢀmaskꢀreferencedꢀtoꢀbothꢀedgesꢀofꢀDQS

•ꢀ Fourꢀinternalꢀbanksꢀforꢀconcurrentꢀoperation

AnꢀAutoꢀRefreshꢀmodeꢀisꢀprovided,ꢀalongꢀwithꢀaꢀSelfꢀ

Refreshꢀmode.ꢀAllꢀI/OsꢀareꢀSSTL_2ꢀcompatible.

•ꢀ DataꢀMaskꢀforꢀwriteꢀdata.ꢀDMꢀmasksꢀwriteꢀdataꢀ

ADDRESS TABLE

at both rising and falling edges of data strobe

Parameter

8M x 32

16M x 16

32M x 8

•ꢀ BurstꢀLength:ꢀ2,ꢀ4ꢀandꢀ8

•ꢀ BurstꢀType:ꢀSequentialꢀandꢀInterleaveꢀmode

•ꢀ ProgrammableꢀCASꢀlatency:ꢀ2,ꢀ2.5ꢀandꢀ3ꢀ

•ꢀ AutoꢀRefreshꢀandꢀSelfꢀRefreshꢀModes

•ꢀ AutoꢀPrecharge

Conﬁguration 2Mꢀxꢀ32ꢀxꢀ4ꢀ

4Mꢀxꢀ16ꢀxꢀ4ꢀ

banks

8Mꢀxꢀ8ꢀxꢀ4ꢀ

banks

BankꢀAddressꢀ BA0,ꢀBA1

Pins

BA0,ꢀBA1

Autoprecharge A8/AP

Pins

A10/AP

•ꢀ TRASꢀLockoutꢀsupportedꢀ(tRAP = tRCD)

RowꢀAddress 4K(A0ꢀ–ꢀA11) 8K(A0ꢀ–ꢀA12) 8K(A0ꢀ–ꢀA12)

OPTIONS

Column

Address

512(A0ꢀ–ꢀA7,ꢀ 512(A0ꢀ–ꢀA8) 1K(A0ꢀ–ꢀA9)

A9)

•ꢀ Conﬁguration(s):ꢀ8Mx32,ꢀ16Mx16,ꢀ32Mx8

•ꢀ Package(s):ꢀ

ꢀ 144ꢀBallꢀBGAꢀ(x32)

66-pinꢀTSOP-IIꢀ(x8,ꢀx16)ꢀandꢀ60ꢀBallꢀBGAꢀ(x8,ꢀx16)

•ꢀ Lead-freeꢀpackageꢀavailable

•ꢀ TemperatureꢀRange:ꢀ

RefreshꢀCount

Com./Ind./A1 4Kꢀ/ꢀ64ms

A2 4Kꢀ/ꢀ16ms

8Kꢀ/ꢀ64ms

8Kꢀ/ꢀ16ms

8Kꢀ/ꢀ64ms

KEY TIMING PARAMETERS

ꢀ Commercialꢀ(0°Cꢀtoꢀ+70°C)

Speed Grade

-5

-6

Units

ꢀ Industrialꢀ(-40°Cꢀtoꢀ+85°C)

Automotive,ꢀA1ꢀ(-40°Cꢀtoꢀ+85°C)

Automotive,ꢀA2ꢀ(-40°Cꢀtoꢀ+105°C)

FCkꢀMaxꢀCLꢀ=ꢀ3ꢀ

FCkꢀMaxꢀCLꢀ=ꢀ2.5ꢀ

FCkꢀMaxꢀCLꢀ=ꢀ2ꢀ

200ꢀ

167ꢀ

133ꢀ

167ꢀ

133ꢀ

ꢀ MHz

notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest

version of this device speciﬁcation before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-

ably be expected to cause failure of the life support system or to signiﬁcantly affect its safety or effectiveness. Products are not authorized for use in such applications

unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:

a.) the risk of injury or damage has been minimized;

b.) the user assume all such risks; and

c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances

Integrated Silicon Solution, Inc.

Rev. 0A

03/24/2014

12 3 4 5 6 7...32

中文翻译

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与IS43R83200F相关器件

型号	品牌	获取价格	描述	数据表
IS43R83200F-5TL	ISSI	获取价格	DDR DRAM, 32MX8, 0.7ns, CMOS, PDSO66, 0.400 INCH, LEAD FREE, TSOP2-66
IS43R83200F-5TLI	ISSI	获取价格	DDR DRAM, 32MX8, 0.7ns, CMOS, PDSO66, 0.400 INCH, LEAD FREE, TSOP2-66
IS43R83200F-5TL-TR	ISSI	获取价格	IC DRAM 256M PARALLEL 66TSOP II
IS43R83200F-6TL	ISSI	获取价格	DDR DRAM, 32MX8, 0.7ns, CMOS, PDSO66, 0.400 INCH, LEAD FREE, TSOP2-66
IS43R83200F-6TLI	ISSI	获取价格	DDR DRAM, 32MX8, 0.7ns, CMOS, PDSO66, 0.400 INCH, LEAD FREE, TSOP2-66
IS43R83200F-6TLI-TR	ISSI	获取价格	IC DRAM 256M PARALLEL 66TSOP II
IS43R83200F-6TL-TR	ISSI	获取价格	IC SDRAM 256MBIT 166MHZ 66TSOP
IS43R86400D-5BL	ISSI	获取价格	IC DRAM 512M PARALLEL 60TFBGA
IS43R86400D-5BLI	ISSI	获取价格	DDR DRAM, 64MX8, 0.7ns, CMOS, PBGA60, 8 X 13 MM, 1.20 MM HEIGHT, 0.80 MM PITCH, LEAD FREE,
IS43R86400D-5BLI-TR	ISSI	获取价格	IC DRAM 512M PARALLEL 60TFBGA

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