Datasheet > IS43DR81280B

IS43DR81280B

更新时间： 2024-11-27 12:23:51

品牌	Logo	应用领域
美国芯成 - ISSI		动态存储器双倍数据速率
页数	文件大小	规格书
28页	549K
描述
1Gb (x8, x16) DDR2 SDRAM

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中文翻译

获取价格

数据手册

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IS43DR81280B 数据手册

IS43/46DR81280B/L, IS43/46DR16640B/L

PRELMINARY INFORMATION

AUGUST 2012

1Gb (x8, x16) DDR2 SDRAM

FEATURES



Clock frequency up to 400MHz

8 internal banks for concurrent operation

4‐bit prefetch architecture

Programmable CAS Latency: 3, 4, 5, 6 and 7

Programmable Additive Latency: 0, 1, 2, 3, 4, 5

and 6



Bidirectional differential Data Strobe (Single‐

ended data‐strobe is an optional feature)

On‐Chip DLL aligns DQ and DQs transitions with

CK transitions

DQS# can be disabled for single‐ended data

strobe



Read Data Strobe supported (x8 only)

Differential clock inputs CK and CK#

VDD and VDDQ = 1.8V ± 0.1V

PASR (Partial Array Self Refresh)

SSTL_18 interface

tRAS lockout supported

Operating temperature:

Commercial (T_A= 0°C to 70°C ; T_C= 0°C to 85°C)

Industrial (T_A= ‐40°C to 85°C; T_C= ‐40°C to 95°C)

Automotive, A1 (T_A= ‐40°C to 85°C; T_C= ‐40°C to 95°C)

Automotive, A2 (T_A= ‐40°C to 105°C; T_C= ‐40°C to

105°C)



Write Latency = Read Latency‐1

Programmable Burst Sequence: Sequential or

Interleave

Programmable Burst Length: 4 and 8

Automatic and Controlled Precharge Command

Power Down Mode

Auto Refresh and Self Refresh

Refresh Interval: 7.8 s (8192 cycles/64 ms)

ODT (On‐Die Termination)



Weak Strength Data‐Output Driver Option

OPTIONS

 Configuration:

ADDRESS TABLE



128Mx8 (16M x 8 x 8 banks)

64Mx16 (8M x 16 x 8 banks)

Parameter

128Mx8

A0‐A13

A0‐A9

64Mx16

A0‐A12

A0‐A9

Row Addressing

Column Addressing

Bank Addressing

Precharge Addressing

 Package:



60‐ball TW‐BGA for x8

84‐ball TW‐BGA for x16

BA0‐BA2

A10

BA0‐BA2

A10

Clock Cycle Timing

‐3D

‐25E

‐25D

Units

Speed Grade

CL‐tRCD‐tRP

tCK (CL=3)

DDR2‐667D

DDR2‐800E

DDR2‐800D

5‐5‐5

6‐6‐6

5‐5‐5

tCK

tCK (CL=4)

tCK (CL=5)

tCK (CL=6)

tCK (CL=7)

3.75

333

3.75

2.5

400

3.75

2.5

400

Frequency (max)

MHz

without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to

obtain the latest version of this device specification before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can

reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such

applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:

a.) the risk of injury or damage has been minimized;

b.) the user assume all such risks; and

c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances

Integrated Silicon Solution, Inc. – www.issi.com –

Rev. 0B, 08/08/2012

12 3 4 5 6 7...28

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与IS43DR81280B相关器件

型号	品牌	获取价格	描述	数据表
IS43DR81280B-25DBL	ISSI	获取价格	DDR DRAM, 128MX8, 0.4ns, CMOS, PBGA60, 8 X 10.50 MM, 1.20 MM HEIGHT, LEAD FREE, TWBGA-60
IS43DR81280B-25DBLI	ISSI	获取价格	IC DRAM 1G PARALLEL 60TWBGA
IS43DR81280B-25DBLI-TR	ISSI	获取价格	DDR DRAM, 128MX8, 0.4ns, CMOS, PBGA60,
IS43DR81280B-25DBL-TR	ISSI	获取价格	DDR DRAM, 128MX8, 0.4ns, CMOS, PBGA60,
IS43DR81280B-25EBL	ISSI	获取价格	DDR DRAM, 128MX8, 0.4ns, CMOS, PBGA60, 8 X 10.50 MM, 1.20 MM HEIGHT, LEAD FREE, TWBGA-60
IS43DR81280B-25EBLI	ISSI	获取价格	DDR DRAM, 128MX8, 0.4ns, CMOS, PBGA60, 8 X 10.50 MM, 1.20 MM HEIGHT, LEAD FREE, TWBGA-60
IS43DR81280B-25EBLI-TR	ISSI	获取价格	DRAM,
IS43DR81280B-25EBL-TR	ISSI	获取价格	IC DRAM 1G PARALLEL 60TWBGA
IS43DR81280B-3DBI-TR	ISSI	获取价格	IC DRAM 1G PARALLEL 60TWBGA
IS43DR81280B-3DBL	ISSI	获取价格	IC DRAM 1G PARALLEL 60TWBGA

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