Datasheet > IS43DR16640C-3DBL

IS43DR16640C-3DBL

更新时间： 2024-11-27 21:09:11

品牌	Logo	应用领域
美国芯成 - ISSI		时钟动态存储器双倍数据速率内存集成电路
页数	文件大小	规格书
49页	984K
描述
DDR DRAM, 64MX16, 0.45ns, CMOS, PBGA84, TWBGA-84

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IS43DR16640C-3DBL 技术参数

是否Rohs认证：	符合	生命周期：	Active
包装说明：	TFBGA, BGA84,9X15,32	Reach Compliance Code：	compliant
ECCN代码：	EAR99	Factory Lead Time：	6 weeks
风险等级：	1.17	访问模式：	MULTI BANK PAGE BURST
最长访问时间：	0.45 ns	其他特性：	AUTO/SELF REFRESH
最大时钟频率 (fCLK)：	333 MHz	I/O 类型：	COMMON
交错的突发长度：	4,8	JESD-30 代码：	R-PBGA-B84
JESD-609代码：	e1	长度：	12.5 mm
内存密度：	1073741824 bit	内存集成电路类型：	DDR DRAM
内存宽度：	16	湿度敏感等级：	3
功能数量：	1	端口数量：	1
端子数量：	84	字数：	67108864 words
字数代码：	64000000	工作模式：	SYNCHRONOUS
最高工作温度：	85 °C	最低工作温度：
组织：	64MX16	输出特性：	3-STATE
封装主体材料：	PLASTIC/EPOXY	封装代码：	TFBGA
封装等效代码：	BGA84,9X15,32	封装形状：	RECTANGULAR
封装形式：	GRID ARRAY, THIN PROFILE, FINE PITCH	峰值回流温度（摄氏度）：	260
电源：	1.8 V	认证状态：	Not Qualified
刷新周期：	8192	座面最大高度：	1.2 mm
自我刷新：	YES	连续突发长度：	4,8
最大待机电流：	0.025 A	子类别：	DRAMs
最大压摆率：	0.27 mA	最大供电电压 (Vsup)：	1.9 V
最小供电电压 (Vsup)：	1.7 V	标称供电电压 (Vsup)：	1.8 V
表面贴装：	YES	技术：	CMOS
温度等级：	OTHER	端子面层：	Tin/Silver/Copper (Sn/Ag/Cu)
端子形式：	BALL	端子节距：	0.8 mm
端子位置：	BOTTOM	处于峰值回流温度下的最长时间：	10
宽度：	8 mm	Base Number Matches：	1

IS43DR16640C-3DBL 数据手册

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IS43/46DR81280C

IS43/46DR16640C

128Mx8, 64Mx16 DDR2 DRAM

DECEMBER 2017

DESCRIPTION

FEATURES

ISSI's 1Gb DDR2 SDRAM uses a double-data-rate

architecture to achieve high-speed operation. The

double-data rate architecture is essentially a 4n-prefetch

architecture, with an interface designed to transfer two

data words per clock cycle at the I/O balls.

•ꢀ Vdd = 1.8V 0.1V, Vddq = 1.8V 0.1V

•ꢀ JEDEC standard 1.8V I/O (SSTL_18-compatible)

•ꢀ Double data rate interface: two data transfers

per clock cycle

•ꢀ Differential data strobe (DQS, DQS)

•ꢀ 4-bit prefetch architecture

•ꢀ On chip DLL to align DQ and DQS transitions

ADDRESS TABLE

with CK

Parameter

128M x 8

64M x 16

•ꢀ 8 internal banks for concurrent operation

•ꢀ Programmable CAS latency (CL) 3, 4, 5, 6 and 7

Conﬁguration

16M x 8 x 8

8M x 16 x 8

banks

supported

Refresh Count

8K/64ms

•ꢀ Posted CAS and programmable additive latency

Row Addressing 16K (A0-A13) 8K (A0-A12)

(AL) 0, 1, 2, 3, 4, 5 and 6 supported

•ꢀ WRITE latency = READ latency - 1 tCK

•ꢀ Programmable burst lengths: 4 or 8

Column

1K (A0-A9)

Addressing

Bank Addressing BA0 - BA2

BA0 - BA2

A10

•ꢀ Adjustable data-output drive strength, full and

Precharge

Addressing

A10

reduced strength options

•ꢀ On-die termination (ODT)

KEY TIMING PARAMETERS

OPTIONS

•ꢀ Conﬁguration(s):

Speed Grade

-25D -3D

128Mx8 (16Mx8x8 banks): IS43/46DR81280C

64Mx16 (8Mx16x8 banks): IS43/46DR16640C

•ꢀ Package:

x8: 60-ball BGA (8mm x 10.5mm)

x16: 84-ball WBGA (8mm x 12.5mm)

•ꢀ Timing – Cycle time

tRCD

12.5

tRP

tRC

tRAS

tCK @CL=3

tCK @CL=4

tCK @CL=5

tCK @CL=6

2.5ns @CL=5 DDR2-800D

2.5ns @CL=6 DDR2-800E

3.0ns @CL=5 DDR2-667D

3.75ns @CL=4 DDR2-533C

3.75 3.75

2.5

—

5ns @CL=3 DDR2-400B

•ꢀ Temperature Range:

Commercial (0°C ≤ Tc ≤ 85°C)

Industrial (-40°C ≤ Tc ≤ 95°C; -40°C ≤ Ta ≤ 85°C)

Automotive, A1 (-40°C ≤ Tc ≤ 95°C; -40°C ≤ Ta ≤ 85°C)

Automotive, A2 (-40°C ≤ Tc; Ta ≤ 105°C)

Tc = Case Temp, T^a= Ambient Temp

notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest

version of this device speciﬁcation before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-

ably be expected to cause failure of the life support system or to signiﬁcantly affect its safety or effectiveness. Products are not authorized for use in such applications

unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:

a.) the risk of injury or damage has been minimized;

b.) the user assume all such risks; and

c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances

Integrated Silicon Solution, Inc. — www.issi.com

Rev. B

12/6/2017

12 3 4 5 6 7...49

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与IS43DR16640C-3DBL相关器件

型号	品牌	获取价格	描述	数据表
IS43DR16640C-3DBLI	ISSI	获取价格	DDR DRAM, 64MX16, 0.45ns, CMOS, PBGA84, TWBGA-84
IS43DR32800A	ISSI	获取价格	256Mb DDR2 DRAM
IS43DR32800A-37CBL	ISSI	获取价格	DDR DRAM, 8MX32, 0.5ns, CMOS, PBGA126, 11 X 14 MM, 0.80 MM PITCH, LEAD FREE, WBGA-126
IS43DR32800A-37CBLI	ISSI	获取价格	DDR DRAM, 8MX32, 0.5ns, CMOS, PBGA126, 11 X 14 MM, 0.80 MM PITCH, LEAD FREE, WBGA-126
IS43DR32800A-37CBL-TR	ISSI	获取价格	DDR DRAM, 8MX32, 0.5ns, CMOS, PBGA126
IS43DR32800A-5BBL	ISSI	获取价格	DDR DRAM, 8MX32, 0.6ns, CMOS, PBGA126, 11 X 14 MM, 0.80 MM PITCH, LEAD FREE, WBGA-126
IS43DR32800A-5BBLI-TR	ISSI	获取价格	DDR DRAM, 8MX32, 0.6ns, CMOS, PBGA126
IS43DR32801A-37CBL	ISSI	获取价格	DDR DRAM, 8MX32, 0.5ns, CMOS, PBGA126, 11 X 14 MM, 0.80 MM PITCH, LEAD FREE, WBGA-126
IS43DR32801A-37CBLI	ISSI	获取价格	DDR DRAM, 8MX32, 0.5ns, CMOS, PBGA126, 11 X 14 MM, 0.80 MM PITCH, LEAD FREE, WBGA-126
IS43DR32801A-37CBLI-TR	ISSI	获取价格	DDR DRAM, 8MX32, 0.5ns, CMOS, PBGA126

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