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IS43DR16320-37CBL PDF预览

IS43DR16320-37CBL

更新时间: 2024-09-17 19:38:07
品牌 Logo 应用领域
美国芯成 - ISSI 动态存储器双倍数据速率内存集成电路
页数 文件大小 规格书
29页 860K
描述
DDR DRAM, 32MX16, CMOS, PBGA84, 13 X 10.50 MM, 0.80 MM PITCH, LEAD FREE, MO-207, FBGA-84

IS43DR16320-37CBL 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:DSBGA
包装说明:TFBGA,针数:84
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.28风险等级:5.34
访问模式:FOUR BANK PAGE BURST其他特性:AUTO/SELF REFRESH
JESD-30 代码:R-PBGA-B84JESD-609代码:e1
长度:13 mm内存密度:536870912 bit
内存集成电路类型:DDR DRAM内存宽度:16
功能数量:1端口数量:1
端子数量:84字数:33554432 words
字数代码:32000000工作模式:SYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:32MX16封装主体材料:PLASTIC/EPOXY
封装代码:TFBGA封装形状:RECTANGULAR
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.2 mm
自我刷新:YES最大供电电压 (Vsup):1.9 V
最小供电电压 (Vsup):1.7 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:40
宽度:10.5 mmBase Number Matches:1

IS43DR16320-37CBL 数据手册

 浏览型号IS43DR16320-37CBL的Datasheet PDF文件第2页浏览型号IS43DR16320-37CBL的Datasheet PDF文件第3页浏览型号IS43DR16320-37CBL的Datasheet PDF文件第4页浏览型号IS43DR16320-37CBL的Datasheet PDF文件第5页浏览型号IS43DR16320-37CBL的Datasheet PDF文件第6页浏览型号IS43DR16320-37CBL的Datasheet PDF文件第7页 
IS43DR86400, IS43/46DR16320  
PRELIMINARY INFORMATION  
NOVEMBER 2009  
512Mb (x8, x16) DDR2 SDRAM  
FEATURES  
Clock frequency up to 400MHz  
OnChip DLL aligns DQ and DQs transitions with  
CK transitions  
Differential clock inputs CK and CK#  
VDD and VDDQ = 1.8V ± 0.1V  
PASR (Partial Array Self Refresh)  
SSTL_18 interface  
Posted CAS  
Programmable CAS Latency: 3, 4, 5 and 6  
Programmable Additive Latency: 0, 1, 2, 3, 4 and 5  
Write Latency = Read Latency1  
Programmable Burst Sequence: Sequential or  
Interleave  
tRAS lockout supported  
Programmable Burst Length: 4 and 8  
Automatic and Controlled Precharge Command  
Power Down Mode  
Read Data Strobe supported (x8 only)  
Internal four bank operations with single pulsed  
RAS  
Operating temperature:  
Auto Refresh and Self Refresh  
Commercial (TA = 0°C to +70°C ; TC = 0°C to 85°C)  
Industrial (TA = 40°C to +85°C; TC = 40°C to 95°C)  
Automotive, A1 (TA = 40°C to +85°C; TC = 40°C to  
95°C)  
Refresh Interval: 7.8 μs (8192 cycles/64 ms)  
OCD (OffChip Driver Impedance Adjustment)  
ODT (OnDie Termination)  
Weak Strength DataOutput Driver Option  
Bidirectional differential Data Strobe (Single‐  
ended datastrobe is an optional feature)  
OPTIONS  
ADDRESS TABLE  
Parameter  
64Mx8  
A0A13  
A0A9  
BA0BA1  
A10  
32Mx16  
A0A12  
A0A9  
BA0BA1  
A10  
Configuration:  
Row Addressing  
Column Addressing  
Bank Addressing  
Precharge Addressing  
64Mx8 (16M x 8 x 4 banks)  
32Mx16 (8M x 16 x 4 banks)  
Package:  
60ball FBGA for x8  
84ball FBGA for x16  
Clock Cycle Timing  
5B  
37C  
3D  
25E  
25D  
Units  
Speed Grade  
CLtRCDtRP  
tCK (CL=3)  
DDR2400B  
DDR2533C  
DDR2667D  
DDR2800E  
DDR2800D  
333  
5
5
444  
5
3.75  
555  
5
3.75  
666  
5
3.75  
555  
5
3.75  
tCK  
ns  
ns  
tCK (CL=4)  
tCK (CL=5)  
5
5
3.75  
3.75  
266  
3
3
3
2.5  
2.5  
400  
ns  
ns  
tCK (CL=6)  
2.5  
400  
Frequency (max)  
200  
333  
MHz  
Note: The 5B device specification is shown for reference only.  
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without  
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the  
latest version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. – www.issi.com –  
1
Rev. 00A, 11/17/2009  

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