Datasheet > IS42S16400J-7BL-TR

IS42S16400J-7BL-TR

更新时间： 2024-11-07 22:58:39

品牌	Logo	应用领域
美国芯成 - ISSI		动态存储器
页数	文件大小	规格书
60页	1462K
描述
IC DRAM 64M PARALLEL 54TFBGA

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IS42S16400J

IS45S16400J

1 Meg Bits x 16 Bits x 4 Banks (64-MBIT)

SYNCHRONOUS DYNAMIC RAM

JULY 2014

FEATURES

OVERVIEW

ISSI'sꢀ64MbꢀSynchronousꢀDRAMꢀisꢀorganizedꢀasꢀ1,048,576ꢀ

bitsꢀ xꢀ 16-bitꢀ xꢀ 4-bankꢀ forꢀ improvedꢀ performance.ꢀ Theꢀ

synchronousꢀ DRAMsꢀ achieveꢀ high-speedꢀ dataꢀ transferꢀ

using pipeline architecture. All inputs and outputs signals

refer to the rising edge of the clock input.

•ꢀ Clock frequency: 200, 166, 143, 133 MHz

•ꢀ Fullyꢀsynchronous;ꢀallꢀsignalsꢀreferencedꢀtoꢀaꢀ

positive clock edge

•ꢀ Internalꢀbankꢀforꢀhidingꢀrowꢀaccess/precharge

•ꢀ Singleꢀ3.3Vꢀpowerꢀsupply

•ꢀ LVTTLꢀinterface

•ꢀ Programmableꢀburstꢀlengthꢀ

KEY TIMING PARAMETERS

– (1, 2, 4, 8, full page)

•ꢀ Programmableꢀburstꢀsequence:ꢀ

Parameter

-5

-6

-7

Unit

Sequential/Interleave

ClkꢀCycleꢀTimeꢀ

CASꢀLatencyꢀ=ꢀ3ꢀ

CASꢀLatencyꢀ=ꢀ2ꢀ

ꢀꢀ

5ꢀ

7.5ꢀ

ꢀ

6ꢀ

7.5ꢀ

ꢀ

7ꢀ

7.5ꢀ

ꢀ

nsꢀ

•ꢀ Selfꢀrefreshꢀmodes

•ꢀ Autoꢀrefreshꢀ(CBR)

ClkꢀFrequencyꢀ

CASꢀLatencyꢀ=ꢀ3ꢀ

CASꢀLatencyꢀ=ꢀ2ꢀ

ꢀꢀ

200ꢀ

133ꢀ

ꢀ

•ꢀ 4096ꢀrefreshꢀcyclesꢀeveryꢀ64ꢀmsꢀ(Com,ꢀInd,ꢀA1ꢀ

166ꢀ

133ꢀ

143ꢀ

133ꢀ

Mhzꢀ

Mhz

grade) or 16ms (A2 grade)

•ꢀ Randomꢀcolumnꢀaddressꢀeveryꢀclockꢀcycle

AccessꢀTimeꢀꢀfromꢀClockꢀ

CASꢀLatencyꢀ=ꢀ3ꢀ

CASꢀLatencyꢀ=ꢀ2ꢀ

ꢀ

4.8ꢀ

5.4ꢀ

nsꢀ

•ꢀ ProgrammableꢀCAS latency (2, 3 clocks)

•ꢀ Burstꢀread/writeꢀandꢀburstꢀread/singleꢀwriteꢀ

operations capability

•ꢀ Burstꢀterminationꢀbyꢀburstꢀstopꢀandꢀprechargeꢀ

command

ADDRESS TABLE

OPTIONS

Parameter

4M x 16

•ꢀ Package:

Conﬁguration

1M x 16 x 4

54-pinꢀTSOPꢀII

banks

54-ballꢀTF-BGAꢀ(8mmꢀxꢀ8mm)

60-ballꢀTF-BGAꢀ(10.1mmꢀxꢀ6.4mm)

Refresh Count

Com./Ind. 4K/64ms

A1 4K/64ms

•ꢀ OperatingꢀTemperatureꢀRange

Commercial (0^oC to +70^oC)

A2 4K/16ms

Industrial (-40^oC to +85^oC)

Row Addresses

A0-A11

AutomotiveꢀGradeꢀA1ꢀ(-40^oC to +85^oC)

AutomotiveꢀGradeꢀA2ꢀ(-40^oC to +105^oC)

Column Addresses

Bank Address Pins

Auto Precharge Pins

A0-A7

BA0, BA1

A10/AP

liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device speciﬁcation before relying on

any published information and before placing orders for products.

Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be ex-

pected to cause failure of the life support system or to signiﬁcantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon

Solution, Inc. receives written assurance to its satisfaction, that:

a.) the risk of injury or damage has been minimized;

b.) the user assume all such risks; and

c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances

Integrated Silicon Solution, Inc. — www.issi.com

Rev. G

7/30/2014

12 3 4 5 6 7...60

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与IS42S16400J-7BL-TR相关器件

型号	品牌	获取价格	描述	数据表
IS42S16400J-7TL	ISSI	获取价格	IC DRAM 64M PARALLEL 54TSOP
IS42S16400J-7TLI	ISSI	获取价格	Synchronous DRAM, 4MX16, 5.4ns, CMOS, PDSO54, 0.400 INCH, ROHS COMPLIANT, TSOP2-54
IS42S16400J-7TLI-TR	ISSI	获取价格	Synchronous DRAM, 4MX16, 5.4ns, CMOS, PDSO54, 0.400 INCH, ROHS COMPLIANT, TSOP2-54
IS42S16400J-7TL-TR	ISSI	获取价格	IC DRAM 64M PARALLEL 54TSOP
IS42S16400L	ICSI	获取价格	2(1)M words x 8(16) bits x 4 banks (64-mbit) synchronous dynamic ram
IS42S16400L-10T	ISSI	获取价格	Synchronous DRAM, 4MX16, 7ns, CMOS, PDSO54, 0.400 INCH, TSOP2-54
IS42S16400L-10TI	ISSI	获取价格	Synchronous DRAM, 4MX16, 7ns, CMOS, PDSO54, 0.400 INCH, TSOP2-54
IS42S16400L-6T	ISSI	获取价格	Synchronous DRAM, 4MX16, 5.5ns, CMOS, PDSO54, 0.400 INCH, TSOP2-54
IS42S16400L-7T	ISSI	获取价格	Synchronous DRAM, 4MX16, 6ns, CMOS, PDSO54, 0.400 INCH, TSOP2-54
IS42S16400L-7TI	ICSI	获取价格	Synchronous DRAM, 4MX16, 5.4ns, CMOS, PDSO54,

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