Datasheet > IS42R83200D

IS42R83200D

更新时间： 2024-09-25 01:18:03

品牌	Logo	应用领域
美国芯成 - ISSI		动态存储器
页数	文件大小	规格书
62页	1181K
描述
256-MBIT SYNCHRONOUS DRAM

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中文翻译

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数据手册

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IS42R83200D 数据手册

IS42R83200D, IS42R16160D

IS45R83200D, IS45R16160D

32Meg x 8, 16Meg x16

256-MBIT SYNCHRONOUS DRAM

MARCH 2010

OVERVIEW

FEATURES

ISSI'sꢀ256MbꢀSynchronousꢀDRAMꢀꢀachievesꢀhigh-speedꢀ

data transfer using pipeline architecture. All inputs and

outputs signals refer to the rising edge of the clock input.

Theꢀ256MbꢀSDRAMꢀisꢀorganizedꢀasꢀfollows.ꢀ

•ꢀ Clockꢀfrequency:ꢀ133,ꢀ100ꢀꢀMHz

•ꢀ Fullyꢀsynchronous;ꢀallꢀsignalsꢀreferencedꢀtoꢀaꢀ

positive clock edge

•ꢀ Internalꢀbankꢀforꢀhidingꢀrowꢀaccess/precharge

•ꢀ SingleꢀPowerꢀsupply:ꢀ2.5Vꢀ+ꢀ0.2Vꢀ

•ꢀ LVTTLꢀinterface

IS42/45R83200Dꢀ IS42/45R16160Dꢀ

8Mꢀxꢀ8ꢀxꢀ4ꢀBanksꢀ 4Mꢀx16x4ꢀBanksꢀ

54-pinꢀTSOPIIꢀ

54-pinꢀTSOPII

54-ballꢀBGAꢀ

•ꢀ Programmableꢀburstꢀlengthꢀ

ꢀ

ꢀ ꢀ

– (1, 2, 4, 8, full page)

•ꢀ Programmableꢀburstꢀsequence:ꢀ

Sequential/Interleaveꢀ

KEY TIMING PARAMETERS

•ꢀ AutoꢀRefreshꢀ(CBR)

•ꢀ SelfꢀRefresh

Parameter

-75

Unit

ClkꢀCycleꢀTimeꢀ

CASꢀLatencyꢀ=ꢀ3ꢀ

CASꢀLatencyꢀ=ꢀ2ꢀ

ꢀꢀ

ꢀ

•ꢀ 8Kꢀrefreshꢀcyclesꢀeveryꢀ16ꢀmsꢀ(A2ꢀgrade)ꢀorꢀ

7.5ꢀ

10ꢀ

nsꢀ

64 ms (commercial, industrial, A1 grade)

ClkꢀFrequencyꢀ

CASꢀLatencyꢀ=ꢀ3ꢀ

CASꢀLatencyꢀ=ꢀ2ꢀ

ꢀꢀ

ꢀ

•ꢀ Randomꢀcolumnꢀaddressꢀeveryꢀclockꢀcycle

133ꢀ

100ꢀ

Mhzꢀ

Mhz

•ꢀ ProgrammableꢀCAS latency (2, 3 clocks)

•ꢀ Burstꢀread/writeꢀandꢀburstꢀread/singleꢀwriteꢀ

AccessꢀTimeꢀꢀfromꢀClockꢀ

CASꢀLatencyꢀ=ꢀ3ꢀ

CASꢀLatencyꢀ=ꢀ2ꢀ

ꢀ

5.4ꢀ

6ꢀ

nsꢀ

operations capability

•ꢀ Burstꢀterminationꢀbyꢀburstꢀstopꢀandꢀprechargeꢀ

command

OPTIONS

•ꢀ Package:

ADDRESS TABLE

Parameter

32M x 8

16M x 16

54-pinꢀTSOP-IIꢀ(x8ꢀandꢀx16)

54-ballꢀBGAꢀ(x16ꢀonly)

Conﬁguration

8M x 8 x 4

banks

4M x 16 x 4

banks

•ꢀ OperatingꢀTemperatureꢀRange:

Commercial (0^oC to +70^oC)

Refresh Count

Com./Ind. 8K/64ms

A1 8K/64ms

8K/64ms

8K/16ms

Industrial (-40^oCꢀtoꢀ+85^oC)

AutomotiveꢀGradeꢀA1ꢀ(-40^oCꢀtoꢀ+85^oC)

AutomotiveꢀGradeꢀA2ꢀ(-40^oCꢀtoꢀ+105^oC)

A2 8K/16ms

Row Addresses

A0-A12

A0-A8

Column Addresses

Bank Address Pins

Auto Precharge Pins

A0-A9

BA0, BA1

A10/AP

BA0, BA1

A10/AP

out notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain

the latest version of this device speciﬁcation before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. — www.issi.com

Rev. A

03/02/2010

12 3 4 5 6 7...62

中文翻译

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与IS42R83200D相关器件

型号	品牌	获取价格	描述	数据表
IS42R83200D-75TL	ISSI	获取价格	Synchronous DRAM, 32MX8, 5.4ns, CMOS, PDSO54, 0.400 INCH, ROHS COMPLIANT, TSOP2-54
IS42R83200D-75TLI	ISSI	获取价格	Synchronous DRAM, 32MX8, 5.4ns, CMOS, PDSO54, 0.400 INCH, ROHS COMPLIANT, TSOP2-54
IS42R83200J-75BL	ISSI	获取价格	Synchronous DRAM, 32MX8, 5.4ns, CMOS, PBGA54, TFBGA-54
IS42R83200J-75BLI	ISSI	获取价格	Synchronous DRAM, 32MX8, 5.4ns, CMOS, PBGA54, TFBGA-54
IS42R83200J-75TL	ISSI	获取价格	Synchronous DRAM, 32MX8, 5.4ns, CMOS, PDSO54, TSOP2-54
IS42R83200J-75TLI	ISSI	获取价格	Synchronous DRAM, 32MX8, 5.4ns, CMOS, PDSO54, TSOP2-54
IS42R86400D	ISSI	获取价格	Internal bank for hiding row access/precharge
IS42R86400F	ISSI	获取价格	8K refresh cycles every 64 ms
IS42RM16160D-10BL	ISSI	获取价格	Synchronous DRAM, 16MX16, 8ns, CMOS, PBGA54, 8 X 13 MM, 0.80 MM PITCH, LEAD FREE, MS-207,
IS42RM16160D-10BLI	ISSI	获取价格	Synchronous DRAM, 16MX16, 8ns, CMOS, PBGA54, 8 X 13 MM, 0.80 MM PITCH, LEAD FREE, MS-207,

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