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IS25C128-2P PDF预览

IS25C128-2P

更新时间: 2024-09-21 06:28:03
品牌 Logo 应用领域
美国芯成 - ISSI 可编程只读存储器电动程控只读存储器电可擦编程只读存储器光电二极管
页数 文件大小 规格书
12页 76K
描述
EEPROM, 16KX8, Serial, CMOS, PDIP8, 0.300 INCH, PLASTIC, DIP-8

IS25C128-2P 数据手册

 浏览型号IS25C128-2P的Datasheet PDF文件第2页浏览型号IS25C128-2P的Datasheet PDF文件第3页浏览型号IS25C128-2P的Datasheet PDF文件第4页浏览型号IS25C128-2P的Datasheet PDF文件第5页浏览型号IS25C128-2P的Datasheet PDF文件第6页浏览型号IS25C128-2P的Datasheet PDF文件第7页 
®
IS25C128-2/3  
IS25C256-2/3  
ISSI  
131,072/262,144-BIT SPI SERIAL  
ELECTRICALLY ERASABLE PROM  
PRELIMINARY INFORMATION  
NOVEMBER 2001  
DESCRIPTION  
FEATURES  
The IS25C128 2 is a 1.8V (1.8V 5.5V) 128K bit  
• 2.1 MHz Clock Rate  
(16364x8) electrically Erasable PROM, IS25C128 3 is  
a 2.5V (2.5V 5.5V) 128K bit (16364x8) electrically  
Erasable PROM, IS25C256 2 is a 1.8V (1.8V 5.5V)  
256K bit (32768x8) electrically Erasable PROM,  
IS25C256 3 is a 2.5V (2.5V 5.5V) 256K bit (32768x8)  
electrically Erasable PROM.  
• Low power CMOS  
— Active current less than 3.0 mA (5.5V)  
— Standby current less than 10 µA (5.5V)  
• Low-voltage Operation  
— IS25C256-3 & IS25C128-3 (Vcc = 2.5V to 5.5V)  
— IS25C256-2 & IS25C128-2 (Vcc = 1.8V to 5.5V)  
• Block Write Protection  
This IS25Cxxx family is a low cost and low voltage/low  
power SPI Serial EEPROM. It is fabricated using  
ISSIs advanced CMOS EEPROM technology and  
provides for low power industrial and commercial  
applications. The IS25Cxxx family is available in 8 pin  
PDIP, 8 pin SOIC, and 14 pin TSSOP packages.  
— Protect 1/4, 1/2, or Entire Array  
64 byte page write mode  
• Serial Peripheral Interface (SPI) Compatible  
— Supports SPI Modes 0 (0,0) and 3 (1,1)  
• Self timed write cycles (5 ms Typical)  
• High-reliability  
— Endurance: 1 million cycles per byte  
— Data retention: 100 years  
— ESD protection >4000V  
Each device in this family is enabled through the Chip  
Select (CS) and accessed via a 3-wire interface  
consisting of Serial Data Input (SI), Serial Data Output  
(SO), and Serial Clock (SCK). All programming cycles  
are completely self-timed, and no separate ERASE  
cycle is required before WRITE. BLOCK WRITE  
protection is enabled by programming the status  
register with one of four configurations of write protec-  
tion. Separate program enable and program disable  
instructions are provided for additional data protection.  
Hardware data protection is provided via the #WP pin  
to protect against inadvertent write attempts to the  
status register. The HOLD pin can suspend communi-  
• Industrial temperature available  
8-pin PDIP or SOIC, and 14-pin TSSOP Packages  
cations without re-initializing the serial sequence.  
PRODUCT OFFERING OVERVIEW  
Part No  
Voltage  
1.8V-5.5V  
2.5V-5.5V  
1.8V-5.5V  
2.5V-5.5V  
Speed  
500 KHz  
2.1MHz  
500 KHz  
2.1MHz  
Standby ICC  
< 5 µA  
Read ICC  
1 mA  
Write ICC  
3 mA  
Temperature  
IS25C256-2  
IS25C256-3  
IS25C128-2  
IS25C128-3  
C,I  
C,I  
C,I  
C,I  
< 10 µA  
< 5 µA  
1 mA  
3 mA  
1 mA  
3 mA  
< 10 µA  
1 mA  
3 mA  
This document contains PRELIMINARY INFORMATION data. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the  
best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc.  
Integrated Silicon Solution, Inc. — 1-800-379-4774  
1
PRELIMINARYINFORMATION Rev. 00A  
11/01/01  

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