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IS24C64A-3PI PDF预览

IS24C64A-3PI

更新时间: 2024-09-20 15:35:31
品牌 Logo 应用领域
美国芯成 - ISSI 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟双倍数据速率光电二极管内存集成电路
页数 文件大小 规格书
13页 54K
描述
EEPROM, 8KX8, Serial, CMOS, PDIP8, 0.300 INCH, PLASTIC, DIP-8

IS24C64A-3PI 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP8,.3针数:8
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.87
最大时钟频率 (fCLK):0.4 MHz数据保留时间-最小值:100
耐久性:1000000 Write/Erase CyclesI2C控制字节:1010DDDR
JESD-30 代码:R-PDIP-T8JESD-609代码:e0
长度:9.325 mm内存密度:65536 bit
内存集成电路类型:EEPROM内存宽度:8
湿度敏感等级:3功能数量:1
端子数量:8字数:8192 words
字数代码:8000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:8KX8封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP8,.3
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:SERIAL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3/5 V认证状态:Not Qualified
座面最大高度:4.57 mm串行总线类型:I2C
最大待机电流:0.000002 A子类别:EEPROMs
最大压摆率:0.003 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mm最长写入周期时间 (tWC):10 ms
写保护:HARDWAREBase Number Matches:1

IS24C64A-3PI 数据手册

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®
IS24C32A/B  
IS24C64A/B  
ISSI  
65,536 bit/32,768 bit  
2-WIRE SERIAL CMOS EEPROM  
ADVANCEDINFORMATION  
MAY2004  
FEATURES  
DESCRIPTION  
• Two-Wire Serial Interface  
The IS24C32A/B and IS24C64A/B are electrically  
erasable PROM devices that use the standard 2-  
wire interface for communications. The IS24C32A/B  
and IS24C64A/B contain a memory array of 32K-  
bits (4K x 8) and 64K-bits (8K x 8), respectively.  
Each device is organized into 32 byte pages for  
page write mode.  
–Bi-directional data transfer protocol  
• 400 KHz (I2C Protocol) Compatibility  
• Low Power CMOS Technology  
–Standby Current less than 6 µA (5.0V)  
–Read Current less than 2 mA (5.0V)  
–Write Current less than 3 mA (5.0V)  
• Flexible Voltage Operation  
This EEPROM is offered in wide operating volt-  
ages of 1.8V to 5.5V (IS24Cxx-2) and 2.5V to 5.5V  
(IS24Cxx-3) to be compatible with most application  
voltages. ISSI designed this device family to be a  
practical, low-power 2-wire EEPROM solution.  
The devices are available in 8-pin PDIP, 8-pin  
SOIC and 8-pin TSSOP packages.  
–Vcc = 1.8V to 5.5V for –2 version  
–Vcc = 2.5V to 5.5V for –3 version  
• Hardware Data Protection  
–IS24C32A/64A: WP protects entire array  
–IS24C32B/64B: WP protects top quarter of  
array  
• Sequential Read Feature  
The IS24C32A/32B/64A/64B (IS24CXX) maintains  
compatibility with the popular 2-wire bus protocol,  
so it is easy to use in applications implementing  
this bus type. The simple bus consists of the  
Serial Clock wire (SCL) and the Serial Data wire  
(SDA). Using the bus, a Master device such as a  
microcontroller is usually connected to one or  
more Slave devices such as this device. The bit  
stream over the SDA line includes a series of  
bytes, which identifies a particular Slave device,  
an instruction, an address within that Slave device,  
and a series of data, if appropriate. The IS24CXX  
has a Write Protect pin (WP) to allow blocking of  
any write instruction transmitted over the bus.  
• Filtered Inputs for Noise Suppression  
• 8-pin PDIP, 8-pin SOIC and 8-pin TSSOP  
packages  
• Self time write cycle with auto clear  
5 ms @ 2.5V  
• Organization:  
–IS24C32A/B: 4Kx8 (128 pages of 32 bytes)  
–IS24C64A/B: 8Kx8 (256 pages of 32 bytes)  
• 32 Byte Page Write Buffer  
• High Reliability  
–Endurance: 1,000,000 Cycles  
–Data Retention: 100 Years  
• Commercial and Industrial temperature ranges  
Copyright © 2004 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time  
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to  
obtain the latest version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. — 1-800-379-4774  
ADVANCEDINFORMATION Rev. 00B  
1
05/05/04  

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