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IS24C64-GI PDF预览

IS24C64-GI

更新时间： 2024-11-10 19:56:03
品牌 Logo 应用领域
美国芯成 - ISSI 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟双倍数据速率光电二极管内存集成电路
页数 文件大小 规格书
11页 112K
描述
EEPROM, 8KX8, Serial, CMOS, PDSO8, SOIC-8

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IS24C64-GI 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP, SOP8,.25针数：8
Reach Compliance Code：not_compliantECCN代码：EAR99
HTS代码：8542.32.00.51风险等级：5.76
其他特性：HARDWARE WRITE PROTECTION; DATA RETENTION 100 YEARS; 1 MILLION ENDURANCE CYCLES最大时钟频率 (fCLK)：0.4 MHz
数据保留时间-最小值：100耐久性：1000000 Write/Erase Cycles
I2C控制字节：1010DDDRJESD-30 代码：R-PDSO-G8
JESD-609代码：e0长度：4.9 mm
内存密度：65536 bit内存集成电路类型：EEPROM
内存宽度：8功能数量：1
端子数量：8字数：8192 words
字数代码：8000工作模式：SYNCHRONOUS
最高工作温度：85 °C最低工作温度：-40 °C
组织：8KX8封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP8,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
并行/串行：SERIAL峰值回流温度（摄氏度）：240
电源：5 V认证状态：Not Qualified
座面最大高度：1.75 mm串行总线类型：I2C
最大待机电流：0.00002 A子类别：EEPROMs
最大压摆率：0.003 mA最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：30
宽度：3.9 mm最长写入周期时间 (tWC)：10 ms
写保护：HARDWAREBase Number Matches：1

IS24C64-GI 数据手册

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®
IS24C64  
65,552-BIT SERIAL ELECTRICALLY  
ERASABLE PROM  
ISSI
ADVANCE INFORMATION  
OCTOBER 1997  
FEATURES  
OVERVIEW  
• 400 KHz (5V) Compatibility  
• Low power CMOS  
The IS24C64 provides 65,536 bits of serial electrically  
erasableandprogrammablereadonlymemory(EEPROM)  
organized as 8197 words of 8 bits each. It is fabricated  
using ISSI’s advanced CMOS EEPROM technology and  
operates from a single supply.  
– Active current less than 3.0 mA  
– Standby current less than 35 µA  
• Operating voltage: 4.5V to 5.5V  
• Hardware write protection  
– Write control pin  
• Internally organized: 8192 x 8  
• 32 byte page write mode (partial page writes  
allowed)  
The IS24C64 is internally organized as 256 pages of 32  
bytes each. Random word addressing requires 12/13 bit  
data word address bank. The IS24C64 cascadable fea-  
ture allows up to 8 devices to share a common 2-wire bus.  
Included is a bidirectional serial data bus synchronized by  
a clock offering flexible byte write and a faster 32-byte  
pagewrite.Awriteprotectpincanprotectdataintheupper  
quadrant of memory.  
• Two-wire serial interface  
• Bidirectional data transfer protocol  
• Self timed write cycles (10 ms max)  
• High-reliability  
– Endurance: 1 million cycles per byte  
– Data retention: 100 years  
• Industrial temperature available  
• 8-pin PDIP or SOIC packages  
PIN DESCRIPTIONS  
Serial Clock (SCL) - The SCL input is used to positive  
edgeclockalldataintothedevice.IntheREADmode,data  
is clocked out on the falling edge of SCL.  
SerialData(SDA)-TheSDApinisabidirectionalpinused  
to transfer data into and out of the device. Data may  
change only when SCL is LOW. It is an open-drain output,  
and may be wire-ORed with any number of open-drain or  
open-collector outputs.  
PIN CONFIGURATION  
8-Pin DIP and SOIC  
Device/Page Addresses (A0, A1, and A2):  
The A2, A1 and A0 pins are device address inputs that are  
hard wired or left not connected for hardware compatibility  
with IS24C64. When the pins are hardwired, as many as  
eight 64K devices may be addressed on a single bus  
system (device addressing is discussed in detail under the  
Device Addressing section). When the pins are not  
hardwired, the default A2, A1 and A0 are zero.  
A0  
A1  
1
2
3
4
8
7
6
5
VCC  
WC  
A2  
SCL  
SDA  
GND  
PIN DESCRIPTIONS  
Write Control (WC) - The Write Control input is used to  
disable any attempt to write to the memory. When HIGH,  
the upper quadrant (16K bits)of array is protected against  
write operations; when LOW, the write function is normal.  
The part can be read independent of the state of WC pin.  
When not connected this pin will be pulled LOW.  
A0-A2  
SDA  
SCL  
WC  
Address Inputs (No connection)  
Serial Data I/O  
Serial Clock Input  
Write Control Input  
Power  
Vcc  
GND  
Ground  
This document contains ADVANCE INFORMATION data. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible  
product. We assume no responsibility for any errors which may appear in this publication. © Copyright 1997, Integrated Silicon Solution, Inc.  
Integrated Silicon Solution, Inc.  
ADVANCE INFORMATION EE011-0A  
1
10/29/97  
1234567...11

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