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IS24C52-2S

更新时间： 2024-11-17 22:48:03
品牌 Logo 应用领域
美国芯成 - ISSI 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
14页 70K
描述
2k-bit 2-WIRE SERIAL CMOS EEPROM with Permanent Write-Protection

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中文翻译

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IS24C52-2S 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：MSOP包装说明：MSOP-8
针数：8Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.32.00.51
风险等级：5.92最大时钟频率 (fCLK)：0.1 MHz
JESD-30 代码：S-PDSO-G8JESD-609代码：e0
长度：3 mm内存密度：2048 bit
内存集成电路类型：EEPROM内存宽度：8
功能数量：1端子数量：8
字数：256 words字数代码：256
工作模式：SYNCHRONOUS最高工作温度：70 °C
最低工作温度：组织：256X8
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：SQUARE封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行：SERIAL峰值回流温度（摄氏度）：240
认证状态：Not Qualified座面最大高度：1.1 mm
串行总线类型：I2C最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：1.8 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：30
宽度：3 mm最长写入周期时间 (tWC)：10 ms
Base Number Matches：1

IS24C52-2S 数据手册

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®
IS24C52  
ISSI  
2k-bit 2-WIRE SERIAL CMOS EEPROM  
with Permanent Write-Protection  
ADVANCEDINFORMATION  
JANUARY2004  
FEATURES  
DESCRIPTION  
• Two-Wire Serial Interface  
The IS24C52 is an electrically erasable PROM device  
that uses the standard 2-wire interface for  
– Bidirectional data transfer protocol  
– 400 kHz (I2C TM Protocol) Compatibility  
communications. The IS24C52 contains a memory array  
of 2,048-bits (256K x 8), and is further subdivided into 16  
pages of 16 bytes each for page-write mode. The  
software write-protection feature is initiated with a unique  
irreversible instruction. After this command is  
• Organization:  
– 256-bit x 8-bit  
transmitted, the first 128 bytes of the array become  
permanently read-only. This feature is popular in  
applications like DRAM DIMMs to retain DRAM related  
data. This EEPROM is offered in wide operating voltages  
of 1.8V to 5.5V (IS24C52-2) and 2.5V to 5.5V (IS24C52-  
3) to be compatible with most application voltages. ISSI  
designed the IS24C52 as a low-cost and low-power 2-  
wire EEPROM solution. The devices are packaged in 8-  
pin SOIC, and 8-pin TSSOP, and 8-pin MSOP.  
• Data Protection Features  
– Write Protect Pin  
– Permanent Software Protection  
• 16-Byte Page Write Buffer  
– Partial Page-writes permitted  
• Low Power CMOS Technology  
– Active Current less than 2 mA (5V)  
– Standby Current less than 6 µA (5V)  
– Standby Current less than 2 µA (2.5V)  
• Low Voltage Operation  
The IS24C52 maintains compatibility with the popular 2-  
wire bus protocol, so it is easy to use in applications  
implementing this bus type. The simple bus consists of  
the Serial Clock wire (SCL) and the Serial Data wire  
(SDA). Using the bus, a Master device such as a  
microcontroller is usually connected to one or more  
Slave devices such as the IS24C52. The bit stream over  
the SDA line includes a series of bytes, which identifies  
a particular Slave device, an instruction, an address  
within that Slave device, and a series of data, if  
appropriate. The IS24C52 has a Write Protect pin (WP)  
to allow blocking of any write instruction transmitted over  
the bus.  
– IS24C52-2: Vcc = 1.8V to 5.5V  
– IS24C52-3: Vcc = 2.5V to 5.5V  
• Random or Sequential Read Modes  
• Filtered Inputs for Noise Suppression  
• Self timed Write cycle with auto clear  
– 5 ms @ 2.5V  
• HighReliability  
– Endurance: 1,000,000 Cycles  
– Data Retention: 40 Years  
• Commercial and Industrial temperature ranges  
• 8-pin SOIC, 8-pin TSSOP, and 8-pin MSOP  
Copyright © 2004 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability  
arisingoutoftheapplicationoruseofanyinformation, productsorservicesdescribedherein. Customersareadvisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonanypublished  
informationandbeforeplacingordersforproducts.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
PRELIMINARYINFORMATION Rev.00B  
1
01/26/04  
1234567...14

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