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IRS21094STRPBF PDF预览

IRS21094STRPBF

更新时间: 2024-01-19 09:04:18
品牌 Logo 应用领域
英飞凌 - INFINEON 驱动光电二极管接口集成电路
页数 文件大小 规格书
27页 718K
描述
Half Bridge Based Peripheral Driver, CMOS, PDSO14, ROHS COMPLIANT, MS-012AB, SOIC-14

IRS21094STRPBF 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:ROHS COMPLIANT, MS-012AB, SOIC-14Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.31内置保护:TRANSIENT; UNDER VOLTAGE
接口集成电路类型:HALF BRIDGE BASED PERIPHERAL DRIVERJESD-30 代码:R-PDSO-G14
JESD-609代码:e3长度:8.65 mm
湿度敏感等级:2功能数量:1
端子数量:14最高工作温度:125 °C
最低工作温度:-40 °C输出电流流向:SOURCE AND SINK
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:15 V认证状态:Not Qualified
座面最大高度:1.75 mm子类别:MOSFET Drivers
最大供电电压:20 V最小供电电压:10 V
标称供电电压:15 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED断开时间:0.28 µs
接通时间:0.95 µs宽度:3.9 mm
Base Number Matches:1

IRS21094STRPBF 数据手册

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Data Sheet No. PD60261  
IRS2109/IRS21094(S)PbF  
HALF-BRIDGE DRIVER  
Product Summary  
Features  
Floating channel designed for bootstrap operation  
Fully operational to +600 V  
Tolerant to negative transient voltage, dV/dt  
immune  
V
600 V max.  
OFFSET  
Gate drive supply range from 10 V to 20 V  
Undervoltage lockout for both channels  
I +/-  
O
120 mA / 250 mA  
10 V - 20 V  
3.3 V, 5 V, and 15 V input logic compatible  
Cross-conduction prevention logic  
V
OUT  
Matched propagation delay for both channels  
t
(typ.)  
750 ns & 200 ns  
540 ns  
on/off  
High-side output in phase with IN input  
Logic and power ground +/- 5 V offset.  
Deadtime  
(programmable up to 5 µs for IRS21094)  
Internal 540 ns deadtime, and programmable  
up to 5 µs with one external R resistor (IRS21094)  
DT  
Lower di/dt gate driver for better noise immunity  
Shutdown input turns off both channels.  
Packages  
RoHS compliant  
Description  
The IRS2109/IRS21094 are high voltage, high  
speed power MOSFET and IGBT drivers with de-  
pendent high- and low-side referenced output  
channels. Proprietary HVIC and latch immune  
CMOS technologies enable ruggedized monolithic  
construction. The logic input is compatible with stan-  
dard CMOS or LSTTL output, down to 3.3 V logic.  
The output drivers feature a high pulse current  
buffer stage designed for minimum driver cross-con-  
duction. The floating channel can be used to drive  
an N-channel power MOSFET or IGBT in the high-  
side configuration which operates up to 600 V.  
8 Lead SOIC  
14 Lead SOIC  
14 Lead PDIP  
8 Lead PDIP  
Typical Connection  
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IRS21094  
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IRS2109  
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(Refer to Lead Assignments for correct  
configuration). These diagrams show electrical  
connections only. Please refer to our  
Application Notes and DesignTips for proper  
circuit board layout.  
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