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IRS21091S PDF预览

IRS21091S

更新时间: 2024-11-19 15:18:51
品牌 Logo 应用领域
英飞凌 - INFINEON 驱动双极性晶体管光电二极管驱动器
页数 文件大小 规格书
20页 752K
描述
600 V 半桥驱动器 IC,具有典型的 0.29 A 拉电流和 0.6 A 灌电流,采用 8 引脚 SOIC 封装,适用于 IGBT 和 MOSFET。也有 8 引脚 PDIP 封装可选。

IRS21091S 数据手册

 浏览型号IRS21091S的Datasheet PDF文件第2页浏览型号IRS21091S的Datasheet PDF文件第3页浏览型号IRS21091S的Datasheet PDF文件第4页浏览型号IRS21091S的Datasheet PDF文件第5页浏览型号IRS21091S的Datasheet PDF文件第6页浏览型号IRS21091S的Datasheet PDF文件第7页 
Data Sheet No. PD60311  
IRS21091(S)PbF  
HALF-BRIDGE DRIVER  
Features  
Floating channel designed for bootstrap operation  
Fully operational to +600 V  
Tolerant to negative transient voltage, dV/dt  
immune  
Gate drive supply range from 10 V to 20 V  
Undervoltage lockout for both channels  
3.3 V, 5 V, and 15 V input logic compatible  
Cross-conduction prevention logic  
Matched propagation delay for both channels  
High-side output in phase with IN input  
Logic and power ground +/- 5 V offset  
Internal 500 ns deadtime, and programmable  
·
Product Summary  
·
·
V
600 V max.  
OFFSET  
·
·
I +/-  
O
120 mA / 250 mA  
10 V - 20 V  
·
V
OUT  
·
·
t
(typ.)  
750 ns & 200 ns  
540 ns  
on/off  
·
·
Deadtime  
·
up to 5 µs with one external R resistor  
DT  
Lower di/dt gate driver for better noise immunity  
The dual function DT/SD input turns off both  
channels  
·
·
Packages  
RoHS compliant  
·
Description  
The IRS21091 is a high voltage, high speed power  
MOSFET and IGBT driver with dependent high- and  
low-side referenced output channels. Proprietary  
HVIC and latch immune CMOS technologies enable  
ruggedized monolithic construction. The logic input is  
compatible with standard CMOS or LSTTL output,  
down to 3.3 V logic. The output drivers feature a  
high pulse current buffer stage designed for minimum  
8 Lead PDIP  
IRS21091  
8 Lead SOIC  
IRS21091S  
driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in  
the high-side configuration which operates up to 600 V.  
Typical Connection  
up to 600 V  
VCC  
VCC  
VB  
HO  
VS  
IN  
IN  
TO  
LOAD  
DT/SD  
DT/SD  
COM  
LO  
(Refer to Lead Assignments for  
correct configuration). These dia-  
grams show electrical connec-  
tions only. Please refer to our  
Application Notes and DesignTips  
for proper circuit board layout.  
www.irf.com  
1

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