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IRS2011SPBF PDF预览

IRS2011SPBF

更新时间: 2024-01-20 20:26:26
品牌 Logo 应用领域
英飞凌 - INFINEON 外围驱动器驱动程序和接口接口集成电路光电二极管
页数 文件大小 规格书
19页 337K
描述
HIGH AND LOW SIDE DRIVER

IRS2011SPBF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SOIC
包装说明:ROHS COMPLIANT, PLASTIC, MS-012AA, SOIC-8针数:8
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.3
内置保护:TRANSIENT; UNDER VOLTAGE接口集成电路类型:BUFFER OR INVERTER BASED PERIPHERAL DRIVER
JESD-30 代码:R-PDSO-G8JESD-609代码:e3
长度:4.9 mm湿度敏感等级:2
功能数量:1端子数量:8
最高工作温度:125 °C最低工作温度:-40 °C
输出电流流向:SINK封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:15 V
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:MOSFET Drivers最大供电电压:20 V
最小供电电压:10 V标称供电电压:15 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
断开时间:0.08 µs接通时间:0.08 µs
宽度:3.9 mm

IRS2011SPBF 数据手册

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Data Sheet No.PD60221  
IRS2011(S)PbF  
HIGH AND LOW SIDE DRIVER  
Product Summary  
Features  
Floating channel designed for bootstrap operation  
Fully operational up to +200 V  
V
200 V max.  
OFFSET  
Tolerant to negative transient voltage, dV/dt immune  
Gate drive supply range from 10 V to 20 V  
Independent low-side and high-side channels  
Input logic HIN/LIN active high  
I +/-  
O
1.0 A /1.0 A typ.  
10 V - 20 V  
60 ns typ.  
Undervoltage lockout for both channels  
3.3 V and 5 V input logic compatible  
CMOS Schmitt-triggered inputs with pull-down  
Matched propagation delay for both channels  
RoHS compliant  
V
OUT  
t
on/off  
Delay Matching  
20 ns max.  
Applications  
Audio Class D amplifiers  
High power DC-DC SMPS converters  
Packages  
DC motor drive  
Description  
The IRS2011 is a high power, high speed power MOSFET  
driver with independent high and low-side referenced output  
channels, ideal for Audio Class D and DC-DC converter appli-  
cations. Logic inputs are compatible with standard CMOS or  
LSTTL output, down to 3.3 V logic. The output drivers feature a  
IRS2011S  
8-Lead SOIC  
IRS2011  
8-Lead PDIP  
high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are  
matched to simplify use in high frequency applications. The floating channel can be used to drive an N-  
channel power MOSFET in the high-side configuration which operates up to 200 V. Proprietary HVIC and  
latch immune CMOS technologies enable ruggedized monolithic construction.  
ꢀꢁꢁꢂꢃ  
Typical Connection  
5
4
1
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8
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(Refer to Lead Assignments for correct configuration). This diagram shows electrical connections only.  
Please refer to our Application Notes and DesignTips for proper circuit board layout.  
www.irf.com  
1

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