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IRF9620S, SiHF9620S PDF预览

IRF9620S, SiHF9620S

更新时间: 2024-10-01 14:55:27
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威世 - VISHAY /
页数 文件大小 规格书
9页 195K
描述
Power MOSFET

IRF9620S, SiHF9620S 数据手册

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IRF9620S, SiHF9620S  
www.vishay.com  
Vishay Siliconix  
Power MOSFET  
FEATURES  
S
• Surface-mount  
D2PAK (TO-263)  
• Available in tape and reel  
• Dynamic dV/dt rating  
• P-channel  
Available  
Available  
G
• Fast switching  
• Ease of paralleling  
• Simple drive requirements  
• Material categorization: for definitions of  
D
G
compliance please see www.vishay.com/doc?99912  
S
D
Note  
*
This datasheet provides information about parts that are  
RoHS-compliant and / or parts that are non RoHS-compliant. For  
example, parts with lead (Pb) terminations are not RoHS-compliant.  
Please see the information / tables in this datasheet for details  
P-Channel MOSFET  
PRODUCT SUMMARY  
VDS (V)  
DESCRIPTION  
-200  
The power MOSFETs technology is the key to Vishay’s  
advanced line of Power MOSFET transistors. The efficient  
geometry and unique processing of the Power MOSFETs  
design achieve very low on-state resistance combined with  
high transconductance and extreme device ruggedness.  
R
DS(on) (Ω)  
VGS = -10 V  
1.5  
Qg max. (nC)  
22  
12  
10  
Q
gs (nC)  
gd (nC)  
Q
The D2PAK (TO-263) is a surface-mount power package  
capable of accommodating die sizes up to HEX-4. It  
provides the highest power capability and the lowest  
possible on-resistance in any existing surface-mount  
package. The D2PAK (TO-263) is suitable for high current  
applications because of its low internal connection  
resistance and can dissipate up to 2.0 W in a typical surface  
mount application.  
Configuration  
Single  
ORDERING INFORMATION  
Package  
D2PAK (TO-263)  
SiHF9620S-GE3  
IRF9620SPbF  
D2PAK (TO-263)  
SiHF9620STRL-GE3 a  
IRF9620STRLPbF a  
Lead (Pb)-free and Halogen-free  
Lead (Pb)-free  
Note  
a. See device orientation  
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)  
PARAMETER  
SYMBOL  
LIMIT  
-200  
20  
UNIT  
Drain-Source Voltage  
Gate-Source Voltage  
VDS  
V
VGS  
T
C = 25 °C  
-3.5  
Continuous Drain Current  
VGS at -10 V  
ID  
TC = 100 °C  
-2.0  
A
Pulsed Drain Current a  
IDM  
-14  
Linear Derating Factor  
Linear Derating Factor (PCB mount) e  
0.32  
0.025  
-14  
W/°C  
A
Inductive Current, Clamp  
ILM  
PD  
Maximum Power Dissipation  
T
C = 25 °C  
40  
W
Maximum Power Dissipation (PCB mount) e  
Peak Diode Recovery dV/dt c  
TA = 25 °C  
3.0  
dV/dt  
-5.0  
V/ns  
°C  
Operating Junction and Storage Temperature Range  
Soldering Recommendations (Peak temperature) d  
TJ, Tstg  
-55 to +150  
300  
For 10 s  
Notes  
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 5)  
b. Not Applicabl  
c. ISD -3.5 A, dI/dt 95 A/μs, VDD VDS, TJ 150 °C  
d. 1.6 mm from case  
e. When mounted on 1” square PCB (FR-4 or G-10 material)  
S21-0904-Rev. D, 30-Aug-2021  
Document Number: 91083  
1
For technical questions, contact: hvm@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  

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